公开(公告)号：US20220197368A1

公开(公告)日：2022-06-23

申请号：US17566370

申请日：2021-12-30

Applicant: Micron Technology, Inc.

Inventor： Qing Liang ,  Jonathan Scott Parry

IPC: G06F1/3287 ,  G06F1/28

Abstract: Systems and methods are disclosed, including moving host data stored in volatile memory of the storage system to non-volatile memory of the storage system and transitioning a storage system power status of a unidirectional power state signal interface from an active power status to a low power status.

公开(公告)号：US11269707B2

公开(公告)日：2022-03-08

申请号：US16989274

申请日：2020-08-10

Applicant: Micron Technology, Inc.

Inventor： Qing Liang ,  Jonathan Scott Parry

IPC: G06F11/07

Abstract: In various embodiments, a technique can be provided to address debug efficiency for failures found on an operational system. The approach can make use of an existing pin on a memory device with added logic to respond to a trigger signal structured different from a signal that is normally sent to the existing pin on the memory device such that the memory device performs a normal or routine function of the memory device in response to the signal. In response to detecting one or more error conditions associated with the memory device, a system that interfaces with the memory device can generate the trigger signal to the memory device. In response to receiving the trigger signal, the memory device can dump an error log of the memory device to a memory component in the memory device. The error log can later be retrieved from the memory component for failure analysis.

公开(公告)号：US11243699B2

公开(公告)日：2022-02-08

申请号：US16419685

申请日：2019-05-22

Applicant: Micron Technology, Inc.

Inventor： Giuseppe Cariello ,  Jonathan Scott Parry

IPC: G06F3/06

Abstract: Systems and methods are disclosed comprising receiving a request for a descriptor of a storage system, sending the descriptor to the host including an indication that a component of the storage device is in a restricted operation mode, wherein the host device utilizes the indication to determine a boot mode of the host device.

公开(公告)号：US20210365364A1

公开(公告)日：2021-11-25

申请号：US17397393

申请日：2021-08-09

Applicant: Micron Technology, Inc.

Inventor： David Aaron Palmer ,  Christian M. Gyllenskog ,  Jonathan Scott Parry ,  Stephen Hanna

IPC: G06F12/02 ,  G06F3/06

Abstract: Devices and techniques are disclosed herein for allowing host-based maintenance of a flash memory device. In certain examples, memory write information can be encrypted at the memory device and provided to the host for updating and maintaining memory device maintenance statistics.

公开(公告)号：US20210064548A1

公开(公告)日：2021-03-04

申请号：US16554937

申请日：2019-08-29

Applicant: Micron Technology, Inc.

Inventor： Nadav Grosz ,  Jonathan Scott Parry

IPC: G06F12/14 ,  G06F12/02

Abstract: Devices and techniques for efficient obfuscated logical-to-physical mapping are described herein. For example, activity corresponding to obfuscated regions of an L2P map for a memory device can be tracked. A record of discontinuity between the obfuscated regions and L2P mappings resulting from the activity can be updated. The obfuscated regions can be ordered based on a level of discontinuity from the record of discontinuity. When an idle period is identified, an obfuscated region from the obfuscated regions is selected and refreshed based on the ordering.

公开(公告)号：US20210064468A1

公开(公告)日：2021-03-04

申请号：US16555014

申请日：2019-08-29

Applicant: Micron Technology, Inc.

Inventor： Jonathan Scott Parry ,  Giuseppe Cariello

IPC: G06F11/10 ,  G06F3/06

Abstract: A variety of applications can include apparatus and/or methods that provide shared parity protection to data in memory devices of a memory system. Parity data of different data streams programmed into different blocks of one or more memory devices can be overlapped and wrapped into slots of a volatile memory arranged as a storage device for the parity data. A parity map of parity-to-data reflecting the overlapping of the parity data can be maintained in the volatile memory along with the overlapped parity. The parity map can be updated as parity data is generated from further programming of the data streams. The parity contents of the volatile memory, including the parity map, can be transferred to a non-volatile memory in response to a determination of an occurrence of a transfer criterion. The parity contents flushed to the non-volatile memory can be used to allow correct data reconstruction in case of failures in programming.