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公开(公告)号：US20200014950A1
公开(公告)日：2020-01-09
申请号：US16572323
申请日：2019-09-16
Inventor： Kiyofumi ABE , Takahiro NISHI , Tadamasa TOMA , Ryuichi KANOH , Chong Soon LIM , Ru Ling LIAO , Hai Wei SUN , Sughosh Pavan SHASHIDHAR , Han Boon TEO , Jing Ya LI
IPC: H04N19/51 , H04N19/182 , H04N19/176
Abstract: An image decoder includes circuitry and a memory, wherein the circuitry, in operation, performs a boundary smoothing operation along a boundary between a first partition having a triangular shape and a second partition having a triangular shape that are split from an image block. The boundary smoothing operation includes: first-deriving a first motion vector for the first partition from a first set of motion vector candidates; second-deriving a second motion vector for the second partition from a second set of motion vector candidates; first-predicting first values of a set of pixels of the first partition along the boundary, using the first motion vector; second-predicting second values of the set of pixels of the first partition along the boundary, using the second motion vector; weighting the first values and the second values; and decoding the first partition using the weighted first values and the weighted second values.
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公开(公告)号：US20200014947A1
公开(公告)日：2020-01-09
申请号：US16573517
申请日：2019-09-17
Inventor： Kiyofumi ABE , Takahiro NISHI , Tadamasa TOMA , Ryuichi KANOH , Chong Soon LIM , Ru Ling LIAO , Hai Wei SUN , Sughosh Pavan SHASHIDHAR , Han Boon TEO , Jing Ya LI
IPC: H04N19/44 , H04N19/513 , H04N19/139 , H04N19/105 , H04N19/176
Abstract: An image decoder includes circuitry and a memory, wherein the circuitry, in operation, performs a boundary smoothing operation along a boundary between a first partition having a triangular shape and a second partition having a triangular shape that are split from an image block. The boundary smoothing operation includes: in response to determining to perform the boundary smoothing operation; first-predicting first values of a set of pixels of the first partition along the boundary, using a first motion vector for the first partition; second-predicting second values of the set of pixels of the first partition along the boundary, using a second motion vector for the second partition; weighting the first values and the second values; and decoding the first partition using the weighted first values and the weighted second values.
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公开(公告)号：US20250106424A1
公开(公告)日：2025-03-27
申请号：US18974444
申请日：2024-12-09
Inventor： Chong Soon LIM , Hai Wei SUN , Sughosh Pavan SHASHIDHAR , Ru Ling LIAO , Han Boon TEO , Takahiro NISHI , Ryuichi KANOH , Tadamasa TOMA
IPC: H04N19/44 , H04N19/119 , H04N19/124 , H04N19/13 , H04N19/159 , H04N19/176
Abstract: An image encoder writes a first parameter and a second parameter to a bitstream, and derives a partition mode based on the first and second parameters. Responsive to the derived partition mode being a first partition mode, the image encoder executes the first partition mode including: splitting a block of a picture into a plurality of first blocks including a N×2N block sized N pixels by 2N pixels; splitting the N×2N block, wherein a ternary split is allowed to split the N×2N block in a vertical direction, which is a direction along the 2N pixels, into a plurality of sub blocks including at least one sub block sized N/4×2N, while a binary split is not allowed to split the N×2N block in the vertical direction into two sub blocks that are equally sized N/2×2N; and encoding the plurality of sub blocks.
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公开(公告)号：US20250071275A1
公开(公告)日：2025-02-27
申请号：US18947538
申请日：2024-11-14
Inventor： Sughosh Pavan SHASHIDHAR , Hai Wei SUN , Chong Soon LIM , Ru Ling LIAO , Han Boon TEO , Jing Ya LI , Takahiro NISHI , Kiyofumi ABE , Ryuichi KANOH , Tadamasa TOMA
IPC: H04N19/119 , H04N19/176 , H04N19/184 , H04N19/60
Abstract: An encoder includes circuitry and a memory coupled to the circuitry. The circuitry, in operation, determines whether or not a ternary split process of splitting a block into three sub blocks in a first direction parallel to a first longer side of the block is allowed by comparing a size of a second shorter side of the block to a minimum threshold value. The circuitry, responsive to the ternary split process being allowed, writes, into a bitstream, a split direction parameter indicative of a splitting direction. The circuitry, in operation, splits the block into a plurality of sub blocks in a direction indicated by the split direction parameter; and encodes the plurality of sub blocks. The minimum threshold value corresponds to a minimum size supported in a transform process.
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公开(公告)号：US20250063168A1
公开(公告)日：2025-02-20
申请号：US18934910
申请日：2024-11-01
Inventor： Chong Soon LIM , Hai Wei SUN , Sughosh Pavan SHASHIDHAR , Han Boon TEO , Ru Ling LIAO , Takahiro NISHI , Tadamasa TOMA
IPC: H04N19/119 , H04N19/157 , H04N19/159 , H04N19/176 , H04N19/196 , H04N19/463 , H04N19/96
Abstract: An image encoder/decoder includes circuitry and a memory coupled to the circuitry. When a geometry of a block of a picture satisfies a first condition, the circuitry splits the block of the picture into sub blocks having a first set of geometries. When the geometry of the block does not satisfy the first condition, the circuitry splits the block of the picture into sub blocks having a second set of geometries, the second set of geometries being different from the first set of geometries. The circuitry encodes/decodes the sub blocks of the block.
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Patent Agency Ranking
公开(公告)号：US20240267520A1
公开(公告)日：2024-08-08
申请号：US18640826
申请日：2024-04-19
Inventor： Tadamasa TOMA , Takahiro NISHI , Kiyofumi ABE , Ryuichi KANOH , Chong Soon LIM , Sughosh Pavan SHASHIDHAR , Ru Ling LIAO , Hai Wei SUN , Han Boon TEO , Jing Ya LI
IPC: H04N19/119 , H04N19/157 , H04N19/176
CPC classification number: H04N19/119 , H04N19/157 , H04N19/176
Abstract: An encoder partitions into blocks using a set of block partition modes. The set of block partition modes includes a first partition mode for partitioning a first block, and a second block partition mode for partitioning a second block which is one of blocks obtained after the first block is partitioned. When the number of partitions of the first block partition mode is three, the second block is a center block among the blocks obtained after partitioning the first block, and the partition direction of the second block partition mode is same as the partition direction of the first block partition mode, the second block partition mode indicates that the number of partitions is only three. A parameter for identifying the second block partition mode includes a first flag indicating a horizontal or vertical partition direction, and does not include a second flag indicating the number of partitions.
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公开(公告)号：US20240129523A1
公开(公告)日：2024-04-18
申请号：US18545682
申请日：2023-12-19
Inventor： Kiyofumi ABE , Takahiro NISHI , Tadamasa TOMA , Ryuichi KANOH , Chong Soon LIM , Ru Ling LIAO , Hai Wei SUN , Sughosh Pavan SHASHIDHAR , Han Boon TEO , Jing Ya LI
IPC: H04N19/52 , H04N19/119 , H04N19/176
CPC classification number: H04N19/52 , H04N19/119 , H04N19/176
Abstract: An encoder includes circuitry and memory. Using the memory, the circuitry, in operation, selects an encoding mode from among candidates including a decoder-side motion vector refinement (DMVR) encoding mode and a partition encoding mode. When the DMVR encoding mode is selected, the circuitry: obtains a first motion vector for a first image block; derives a second motion vector from the first motion vector using motion search; and generates a prediction image for the first image block using the second motion vector. When the partition encoding mode is selected, the circuitry: determines a plurality of partitions in a second image block; obtains a third motion vector for each partition; and generates a prediction image for the second image block using the third motion vector, without deriving a fourth motion vector from the third motion vector using motion search.
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公开(公告)号：US20240114134A1
公开(公告)日：2024-04-04
申请号：US18530032
申请日：2023-12-05
Inventor： Sughosh Pavan SHASHIDHAR , Hai Wei SUN , Chong Soon LIM , Ru Ling LIAO , Han Boon TEO , Jing Ya LI , Takahiro NISHI , Kiyofumi ABE , Ryuichi KANOH , Tadamasa TOMA
IPC: H04N19/119 , H04N19/176 , H04N19/184 , H04N19/60
CPC classification number: H04N19/119 , H04N19/176 , H04N19/184 , H04N19/60
Abstract: An encoder includes circuitry and a memory coupled to the circuitry. The circuitry, in operation, determines whether or not a ternary split process of splitting a block into three sub blocks in a first direction parallel to a first longer side of the block is allowed by comparing a size of a second shorter side of the block to a minimum threshold value. The circuitry, responsive to the ternary split process being allowed, writes, into a bitstream, a split direction parameter indicative of a splitting direction. The circuitry, in operation, splits the block into a plurality of sub blocks in a direction indicated by the split direction parameter; and encodes the plurality of sub blocks. The minimum threshold value corresponds to a minimum size supported in a transform process.
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公开(公告)号：US20240015322A1
公开(公告)日：2024-01-11
申请号：US18473027
申请日：2023-09-22
Inventor： Jing Ya LI , Chong Soon LIM , Sughosh Pavan SHASHIDHAR , Ru Ling LIAO , Hai Wei SUN , Han Boon TEO , Kiyofumi ABE , Tadamasa TOMA , Takahiro NISHI
IPC: H04N19/513 , H04N19/119 , H04N19/176 , H04N19/96
CPC classification number: H04N19/521 , H04N19/119 , H04N19/176 , H04N19/96
Abstract: An encoder includes circuitry and memory connected to the circuitry. In operation, the circuitry corrects a base motion vector using a correction value in a fixed direction; and encodes a current partition by using the corrected base motion vector corrected. The correction value is specified by an index indicating one of correction values included in a table. The table is selected from among a plurality of tables, wherein the correction values in one of the plurality of tables have different increments from the correction values in another one of the plurality of tables.
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公开(公告)号：US20230276057A1
公开(公告)日：2023-08-31
申请号：US18118238
申请日：2023-03-07
Inventor： Kiyofumi ABE , Takahiro NISHI , Tadamasa TOMA , Ryuichi KANOH , Chong Soon LIM , Ru Ling LIAO , Hai Wei SUN , Sughosh Pavan SHASHIDHAR , Han Boon TEO , Jing Ya LI
IPC: H04N19/159 , H04N19/513 , H04N19/139 , H04N19/119
CPC classification number: H04N19/159 , H04N19/119 , H04N19/139 , H04N19/521
Abstract: An encoder encodes a video, and includes: circuitry; and memory coupled to the circuitry. Using the memory, the circuitry: obtains at least two items of prediction information for a first partition included in the video; derives at least one template from neighboring samples which neighbor the first partition; calculates at least two costs, using the at least one template and the at least two items of prediction information; using the at least two costs, (i) determines at least one splitting direction for the first partition or (ii) assigns one of the at least two items of prediction information to a second partition split from the first partition according to the splitting direction, and another thereof to a third partition split from the first partition according to the splitting direction; and encodes the first partition according to the splitting direction and the at least two items of prediction information.
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