Display panel and thin film transistor array substrate

    公开(公告)号:US10451945B2

    公开(公告)日:2019-10-22

    申请号:US14906622

    申请日:2016-01-11

    Inventor: Peng Du

    Abstract: A display panel includes a first substrate and a second substrate. A thin film transistor is disposed on the first substrate. The display panel has a non-display area; the non-display area includes a first metal layer, a frequency signal line formed by a second metal layer and located on the first metal layer, a via (contact hole), and a conducting electrode electrically connecting the first and a second metal layers together. At least a part of the conducting electrode is located in the via. A photo spacer is located in the via, for separating the first substrate and the second substrate. The photo spacer completely covers the conducting electrode. The photo spacer is made of a dielectric material.

    Method and system of gesture recognition in touch display device

    公开(公告)号:US10318147B2

    公开(公告)日:2019-06-11

    申请号:US14785937

    申请日:2015-07-20

    Inventor: Peng Du

    Abstract: Disclosed is a method and system of gesture recognition in a touch display device, which is able to predetermine gesture inputs possibly to be made by a user prior to the completion of the user's touch input, and enable a display unit to display all possible similar gesture inputs so as to provide an instruction (or navigation guidance) for the user. Thus, when using a large-sized touch display device, the user does not have to perform touch operations widely throughout the screen of the display device, because the system can recognize the similar gesture inputs in advance, which renders it easier for the user to operate on the touch display device, thereby obtaining a better user experience.

    GOA circuits and liquid crystal displays

    公开(公告)号:US10304404B2

    公开(公告)日:2019-05-28

    申请号:US15509499

    申请日:2017-02-15

    Inventor: Peng Du

    Abstract: A gate driver on array (GOA) and a liquid crystal display are disclosed. The GOA circuit includes a plurality of cascaded GOA units and a plurality of pull-down maintaining circuits. The cascaded GOA units are configured for respectively outputting gate driving signals of first level signals to charge corresponding horizontal scanning lines within a display area when being controlled by a plurality of clock signals. Each of the pull-down maintaining circuits corresponds to at least two cascaded GOA units, and each of the pull-down maintaining circuits is configured for maintaining the corresponding at least two cascaded GOA units to output second level signals as the gate driving signals during a non-operation period. As described above, the disclosure can reduce the amount of the pull-down maintaining circuits, so as to decrease the width of the layout of the GOA circuit to meet the need to design a narrow-frame liquid crystal display.

    Scan driving circuit and flat panel display

    公开(公告)号:US10204581B2

    公开(公告)日:2019-02-12

    申请号:US15123764

    申请日:2016-07-01

    Inventor: Peng Du

    Abstract: The present disclosure provides a scanning driving circuit and a flat panel display. The scanning driving circuit includes a plurality of cascaded scanning driving units, and each scanning driving unit includes an input circuit receiving a higher level transmission signal, a first clock signal and a second clock signal and outputting a present level transmission signal and a pull-up control signal; an output circuit receiving signal from the input circuit and outputting the lower level transmission signal; a control circuit receiving the first pull-down signal, the second pull-down signal and the pull-up control signal and outputting the scanning driving signal; a scan line receiving scanning driving signal and controlling the pixel unit, in order to meeting the driving demand of the charge sharing pixel while ensure the high aperture ratio of the charge sharing pixel and not affect the reliability of the scanning driving circuit.

    LTPS array substrate
    57.
    发明授权

    公开(公告)号:US10192902B2

    公开(公告)日:2019-01-29

    申请号:US15853832

    申请日:2017-12-24

    Abstract: A method for manufacturing a LTPS array substrate includes: forming a source electrode and a drain electrode on a substrate, forming a poly-silicon layer in a first region and a second region of the substrate including the source electrode and the drain electrode, such that the poly-silicon layer of the first region has a thickness greater than that of the second region and the poly-silicon layer of the first region partially covers the source electrode and the drain electrode; passivating a surface of the poly-silicon layer in order to turn a part of the poly-silicon layer of the second region and the first region that is adjacent to the surface into an insulating layer; and forming a gate electrode on the insulating layer between the source electrode and the drain electrode. The LTPS technical process is simple and can reduce the producing costs.

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