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201 条记录 (耗时 0.026 秒)

    SCALABLE APPLICATION-CUSTOMIZED MEMORY COMPRESSION
    51.
    发明申请
    SCALABLE APPLICATION-CUSTOMIZED MEMORY COMPRESSION 审中-公开

    公开(公告)号：US20190243780A1

    公开(公告)日：2019-08-08

    申请号：US16380114

    申请日：2019-04-10

    申请人： Vinodh Gopal ,  Simon N. Peffers

    发明人： Vinodh Gopal ,  Simon N. Peffers

    IPC分类号： G06F12/1027 ,  G06F12/0815 ,  G06F12/1009 ,  G06F12/0811

    CPC分类号： G06F12/1027 ,  G06F12/0811 ,  G06F12/0815 ,  G06F12/1009 ,  G06F2212/401

    摘要： Methods and apparatus for scalable application-customized memory compression. Data is selectively stored in system memory using compressed formats or uncompressed format using a plurality of compression schemes. A compression ID is used to identify the compression scheme (or no compression) to be used and included with read and write requests submitted to a memory controller. For memory writes, the memory controller dynamically compresses data written to memory cache lines using compression algorithms (or no compression) identified by compression ID. For memory reads, the memory controller dynamically decompresses data stored memory cache lines in compressed formats using decompression algorithms identified by the compression ID. Page tables and TLB entries are augments to include a compression ID field. The format of memory cache lines includes a compression metabit indicating whether the data in the cache line is compressed. Support for DMA reads and writes from IO devices such as GPUs using selective memory compression is also provided.

    SECURE MEMORY CONTROLLER
    53.
    发明申请
    SECURE MEMORY CONTROLLER 有权

    公开(公告)号：US20170285986A1

    公开(公告)日：2017-10-05

    申请号：US15086523

    申请日：2016-03-31

    申请人： Vinodh Gopal

    发明人： Vinodh Gopal

    IPC分类号： G06F3/06

    CPC分类号： G06F12/0897 ,  G06F12/1425 ,  G06F21/78 ,  G06F2212/1052 ,  G06F2212/451

    摘要： Methods and apparatus for a secure memory controller. The secure memory controller includes circuitry and logic that is programmed to prevent malicious code from overwrite protected regions of system memory. The memory controller observes memory access patterns and trains itself to identify thread stacks and addresses relating to the thread stacks including stack-frame pointers and return addresses. In one aspect, the memory controller prevents a return address from being overwritten until a proper return from a function call is detected. The memory controller is also configured to prevent malicious code from overwriting page table entries (PTEs) in page tables. Pages containing PTEs are identified, and access is prevented to the PTEs from user-mode code. The PTEs are also scanned to detect corrupted PTEs resulting from bit manipulation by malicious code.

    HARDWARE APPARATUSES AND METHODS FOR MEMORY COMPRESSION AND DECOMPRESSION
    54.
    发明申请
    HARDWARE APPARATUSES AND METHODS FOR MEMORY COMPRESSION AND DECOMPRESSION 审中-公开

    公开(公告)号：US20170285960A1

    公开(公告)日：2017-10-05

    申请号：US15089456

    申请日：2016-04-01

    申请人： Kirk S. Yap ,  Vinodh Gopal ,  James D. Guilford ,  Sean M. Gulley

    发明人： Kirk S. Yap ,  Vinodh Gopal ,  James D. Guilford ,  Sean M. Gulley

    IPC分类号： G06F3/06

    CPC分类号： G06F3/064 ,  G06F12/00 ,  H03M7/30 ,  H03M7/3084

    摘要： Methods and apparatuses relating to memory compression and decompression are described. In one embodiment, a hardware compression engine is to determine when each section of a plurality of sections of a block of data is a zero value, a full match or a partial match to an entry in a dictionary, or a no match to any entry in the dictionary, encode a tag for each section to indicate the one of the zero value, the full match, the partial match, and the no match, encode a literal when the section is the no match, an index to the entry in the dictionary when the section is the full match, and an index to the entry in the dictionary and non-matching bits when the section is the partial match, and update an entry in the dictionary with a value of a section when the section is the no match.

    END-TO-END PROTECTION SCHEME INVOLVING ENCRYPTED MEMORY AND STORAGE
    58.
    发明申请
    END-TO-END PROTECTION SCHEME INVOLVING ENCRYPTED MEMORY AND STORAGE 审中-公开

    公开(公告)号：US20170180116A1

    公开(公告)日：2017-06-22

    申请号：US14979349

    申请日：2015-12-22

    申请人： Kirk S. Yap ,  Vinodh Gopal

    发明人： Kirk S. Yap ,  Vinodh Gopal

    IPC分类号： H04L9/06 ,  G09C1/00

    CPC分类号： H04L9/065 ,  G09C1/00 ,  H04L2209/12

    摘要： Systems, apparatuses and methods may provide for generating encrypted data based on write data received at a first data input of an apparatus and generating an inbound protection bit stream based on the write data. Additionally, write protection metadata may be generated based on the inbound protection bit stream and a first counter. In one example, decrypted data may also be generated based on read data received at a second data input of the apparatus. In such a case, a first outbound protection bit stream may be generated based on the decrypted data, and a second outbound protection bit stream may be generated based on a second counter and outbound protection metadata. Moreover, an error signal may be generated in response to a difference between the first outbound protection bit stream and the second outbound protection bit stream.