公开(公告)号：US12050557B2

公开(公告)日：2024-07-30

申请号：US17532947

申请日：2021-11-22

Applicant: Takashi Suzuki

Inventor： Takashi Suzuki

IPC: G06F16/174 ,  G06F16/00 ,  G06F16/22 ,  G06F16/951 ,  H03M7/30 ,  H03M7/42

CPC classification number: G06F16/1744 ,  G06F16/2246 ,  G06F16/951 ,  H03M7/3088 ,  G06F16/00 ,  H03M7/6017

Abstract: A computerized system and method of compressing symbolic information organized into a plurality of documents, each document having a plurality of symbols, the system and method including: (i) automatically identifying a plurality of sequential (also referred to as adjacent) and/or non-sequential symbol (also referred to as non-adjacent) pairs in an input document; (ii) counting the number of appearances of each unique symbol pair; and (iii) producing a compressed document that includes a replacement symbol at each position associated with one of the plurality of symbol pairs, at least one of which corresponds to a non-sequential symbol pair. For each non-sequential pair the compressed document includes corresponding indicia indicating a distance between locations of the non-sequential symbols of the pair in the input document.

公开(公告)号：US11907557B2

公开(公告)日：2024-02-20

申请号：US17681025

申请日：2022-02-25

Applicant: Intel Corporation

Inventor： Susanne M. Balle ,  Francesc Guim Bernat ,  Slawomir Putyrski ,  Joe Grecco ,  Henry Mitchel ,  Evan Custodio ,  Rahul Khanna ,  Sujoy Sen

IPC: G06F15/80 ,  G06F3/06 ,  G06F16/174 ,  G06F21/57 ,  G06F21/73 ,  G06F8/65 ,  H04L41/0816 ,  H04L41/0853 ,  H04L41/12 ,  H04L67/10 ,  G06F11/30 ,  G06F9/50 ,  H01R13/453 ,  G06F9/48 ,  G06F9/455 ,  H05K7/14 ,  H04L61/5007 ,  H04L67/63 ,  H04L67/75 ,  H03M7/30 ,  H03M7/40 ,  H04L43/08 ,  H04L47/20 ,  H04L47/2441 ,  G06F11/07 ,  G06F11/34 ,  G06F7/06 ,  G06T9/00 ,  H03M7/42 ,  H04L12/28 ,  H04L12/46 ,  G06F13/16 ,  G06F21/62 ,  G06F21/76 ,  H03K19/173 ,  H04L9/08 ,  H04L41/044 ,  H04L49/104 ,  H04L43/04 ,  H04L43/06 ,  H04L43/0894 ,  G06F9/38 ,  G06F12/02 ,  G06F12/06 ,  G06T1/20 ,  G06T1/60 ,  G06F9/54 ,  H04L67/1014 ,  G06F8/656 ,  G06F8/658 ,  G06F8/654 ,  G06F9/4401 ,  H01R13/631 ,  H04L47/78 ,  G06F16/28 ,  H04Q11/00 ,  G06F11/14 ,  H04L41/046 ,  H04L41/0896 ,  H04L41/142 ,  H04L9/40

CPC classification number: G06F3/0641 ,  G06F3/0604 ,  G06F3/065 ,  G06F3/067 ,  G06F3/0608 ,  G06F3/0611 ,  G06F3/0613 ,  G06F3/0617 ,  G06F3/0647 ,  G06F3/0653 ,  G06F7/06 ,  G06F8/65 ,  G06F8/654 ,  G06F8/656 ,  G06F8/658 ,  G06F9/3851 ,  G06F9/3891 ,  G06F9/4401 ,  G06F9/45533 ,  G06F9/4843 ,  G06F9/4881 ,  G06F9/5005 ,  G06F9/505 ,  G06F9/5038 ,  G06F9/5044 ,  G06F9/5083 ,  G06F9/544 ,  G06F11/0709 ,  G06F11/079 ,  G06F11/0751 ,  G06F11/3006 ,  G06F11/3034 ,  G06F11/3055 ,  G06F11/3079 ,  G06F11/3409 ,  G06F12/0284 ,  G06F12/0692 ,  G06F13/1652 ,  G06F16/1744 ,  G06F21/57 ,  G06F21/6218 ,  G06F21/73 ,  G06F21/76 ,  G06T1/20 ,  G06T1/60 ,  G06T9/005 ,  H01R13/453 ,  H01R13/4536 ,  H01R13/4538 ,  H01R13/631 ,  H03K19/1731 ,  H03M7/3084 ,  H03M7/40 ,  H03M7/42 ,  H03M7/60 ,  H03M7/6011 ,  H03M7/6017 ,  H03M7/6029 ,  H04L9/0822 ,  H04L12/2881 ,  H04L12/4633 ,  H04L41/044 ,  H04L41/0816 ,  H04L41/0853 ,  H04L41/12 ,  H04L43/04 ,  H04L43/06 ,  H04L43/08 ,  H04L43/0894 ,  H04L47/20 ,  H04L47/2441 ,  H04L49/104 ,  H04L61/5007 ,  H04L67/10 ,  H04L67/1014 ,  H04L67/63 ,  H04L67/75 ,  H05K7/1452 ,  H05K7/1487 ,  H05K7/1491 ,  G06F11/1453 ,  G06F12/023 ,  G06F15/80 ,  G06F16/285 ,  G06F2212/401 ,  G06F2212/402 ,  G06F2221/2107 ,  H04L41/046 ,  H04L41/0896 ,  H04L41/142 ,  H04L47/78 ,  H04L63/1425 ,  H04Q11/0005 ,  H05K7/1447 ,  H05K7/1492

Abstract: Technologies for dividing work across one or more accelerator devices include a compute device. The compute device is to determine a configuration of each of multiple accelerator devices of the compute device, receive a job to be accelerated from a requester device remote from the compute device, and divide the job into multiple tasks for a parallelization of the multiple tasks among the one or more accelerator devices, as a function of a job analysis of the job and the configuration of each accelerator device. The compute engine is further to schedule the tasks to the one or more accelerator devices based on the job analysis and execute the tasks on the one or more accelerator devices for the parallelization of the multiple tasks to obtain an output of the job.

公开(公告)号：US20230195346A1

公开(公告)日：2023-06-22

申请号：US18109774

申请日：2023-02-14

Applicant: Intel Corporation

Inventor： Francesc Guim Bernat ,  Evan Custodio ,  Susanne M. Balle ,  Joe Grecco ,  Henry Mitchel ,  Slawomir Putyrski

IPC: G06F3/06 ,  G06F16/174 ,  G06F21/57 ,  G06F21/73 ,  G06F8/65 ,  H04L41/0816 ,  H04L41/0853 ,  H04L41/12 ,  H04L67/10 ,  G06F11/30 ,  G06F9/50 ,  H01R13/453 ,  G06F9/48 ,  G06F9/455 ,  H05K7/14 ,  H04L61/5007 ,  H04L67/63 ,  H04L67/75 ,  H03M7/30 ,  H03M7/40 ,  H04L43/08 ,  H04L47/20 ,  H04L47/2441 ,  G06F11/07 ,  G06F11/34 ,  G06F7/06 ,  G06T9/00 ,  H03M7/42 ,  H04L12/28 ,  H04L12/46 ,  G06F13/16 ,  G06F21/62 ,  G06F21/76 ,  H03K19/173 ,  H04L9/08 ,  H04L41/044 ,  H04L49/104 ,  H04L43/04 ,  H04L43/06 ,  H04L43/0894 ,  G06F9/38 ,  G06F12/02 ,  G06F12/06 ,  G06T1/20 ,  G06T1/60 ,  G06F9/54 ,  H04L67/1014 ,  G06F8/656 ,  G06F8/658 ,  G06F8/654 ,  G06F9/4401 ,  H01R13/631

CPC classification number: G06F3/0641 ,  G06F16/1744 ,  G06F21/57 ,  G06F21/73 ,  G06F8/65 ,  H04L41/0816 ,  H04L41/0853 ,  H04L41/12 ,  H04L67/10 ,  G06F11/3079 ,  G06F9/5005 ,  H01R13/4536 ,  H01R13/453 ,  G06F9/5044 ,  G06F9/4843 ,  G06F9/45533 ,  G06F9/5083 ,  H05K7/1491 ,  H04L61/5007 ,  H04L67/63 ,  H04L67/75 ,  G06F3/0608 ,  G06F3/065 ,  G06F3/067 ,  H03M7/6017 ,  H03M7/60 ,  H03M7/40 ,  H03M7/6011 ,  H03M7/6029 ,  G06F3/0611 ,  G06F3/0613 ,  G06F3/0617 ,  G06F3/0647 ,  G06F3/0653 ,  H04L43/08 ,  H04L47/20 ,  H04L47/2441 ,  G06F11/0709 ,  G06F11/0751 ,  G06F11/079 ,  G06F11/3006 ,  G06F11/3409 ,  G06F7/06 ,  G06T9/005 ,  H03M7/3084 ,  H03M7/42 ,  H04L12/2881 ,  H04L12/4633 ,  G06F13/1652 ,  G06F21/6218 ,  G06F21/76 ,  H03K19/1731 ,  H04L9/0822 ,  H04L41/044 ,  H04L49/104 ,  H04L43/04 ,  H04L43/06 ,  H04L43/0894 ,  G06F9/3851 ,  G06F9/4881 ,  G06F9/505 ,  G06F12/0284 ,  G06F12/0692 ,  G06T1/20 ,  G06T1/60 ,  G06F9/3891 ,  G06F9/5038 ,  G06F9/544 ,  H04L67/1014 ,  G06F8/656 ,  G06F8/658 ,  G06F8/654 ,  G06F9/4401 ,  G06F3/0604 ,  G06F11/3034 ,  G06F11/3055 ,  H01R13/4538 ,  H01R13/631 ,  H05K7/1452 ,  H05K7/1487 ,  H04L47/78

Abstract: A compute device to manage workflow to disaggregated computing resources is provided. The compute device comprises a compute engine receive a workload processing request, the workload processing request defined by at least one request parameter, determine at least one accelerator device capable of processing a workload in accordance with the at least one request parameter, transmit a workload to the at least one accelerator device, receive a work product produced by the at least one accelerator device from the workload, and provide the work product to an application.

公开(公告)号：US20180152202A1

公开(公告)日：2018-05-31

申请号：US15720162

申请日：2017-09-29

Applicant: Intel Corporation

Inventor： Vinodh Gopal ,  James D. Guilford

IPC: H03M7/30 ,  H03M7/40

CPC classification number: G06F3/0641 ,  G06F3/0604 ,  G06F3/0608 ,  G06F3/0611 ,  G06F3/0613 ,  G06F3/0617 ,  G06F3/0647 ,  G06F3/065 ,  G06F3/0653 ,  G06F3/067 ,  G06F7/06 ,  G06F8/65 ,  G06F8/654 ,  G06F8/656 ,  G06F8/658 ,  G06F9/3851 ,  G06F9/3891 ,  G06F9/4401 ,  G06F9/4881 ,  G06F9/5038 ,  G06F9/505 ,  G06F9/544 ,  G06F11/0709 ,  G06F11/0751 ,  G06F11/079 ,  G06F11/1453 ,  G06F11/3006 ,  G06F11/3034 ,  G06F11/3055 ,  G06F11/3409 ,  G06F12/023 ,  G06F12/0284 ,  G06F12/0692 ,  G06F13/1652 ,  G06F15/80 ,  G06F16/1744 ,  G06F21/57 ,  G06F21/6218 ,  G06F21/73 ,  G06F21/76 ,  G06F2212/401 ,  G06F2212/402 ,  G06F2221/2107 ,  G06T1/20 ,  G06T1/60 ,  G06T9/005 ,  H01R13/4538 ,  H01R13/631 ,  H03K19/1731 ,  H03M7/3084 ,  H03M7/40 ,  H03M7/42 ,  H03M7/60 ,  H03M7/6011 ,  H03M7/6017 ,  H03M7/6029 ,  H04L9/0822 ,  H04L12/2881 ,  H04L12/4633 ,  H04L41/044 ,  H04L41/046 ,  H04L41/0816 ,  H04L41/0853 ,  H04L41/0896 ,  H04L41/12 ,  H04L41/142 ,  H04L43/04 ,  H04L43/06 ,  H04L43/08 ,  H04L43/0894 ,  H04L47/20 ,  H04L47/2441 ,  H04L47/78 ,  H04L49/104 ,  H04L61/2007 ,  H04L63/1425 ,  H04L67/10 ,  H04L67/1014 ,  H04L67/327 ,  H04L67/36 ,  H05K7/1452 ,  H05K7/1487

Abstract: Technologies for high-ratio compression with heterogeneous history buffers include a computing device having an accelerator complex with a large history buffer and a small history buffer. The large history buffer has a larger size than the small history buffer. For example, the small history buffer may be 32 kilobytes and the large history buffer may be 64 kilobytes, 1 megabyte, or larger. The large history buffer is coupled to a large-buffer compare core that searches for matches in the large history buffer, finds a best match, and forwards the best match to a small-buffer compare core. The small-buffer compare core searches the small history buffer for matches, receives the match forwarded from the large-buffer compare core, and determines a best match from the matches in the small history buffer and the forwarded match. Other embodiments are described and claimed.

公开(公告)号：US20180102789A1

公开(公告)日：2018-04-12

申请号：US15711149

申请日：2017-09-21

Applicant: FUJITSU LIMITED

Inventor： Masahiro KATAOKA

IPC: H03M7/46 ,  H03M7/30

CPC classification number: H03M7/46 ,  H03M7/3086 ,  H03M7/3088 ,  H03M7/6011 ,  H03M7/6017

Abstract: An encoding apparatus reads text data of an encoding target, encodes each character or word in the text data of the encoding target by using a bit map type index in which an appearance position is associated with each of the encoded characters or words, appearing on the text data of the encoding target, as bit map data, and updates the bit map type index with respect to the encoded character or word.

公开(公告)号：US09780806B2

公开(公告)日：2017-10-03

申请号：US14685947

申请日：2015-04-14

Applicant: International Business Machines Corporation

Inventor： Ian R. Finlay

IPC: H03M7/40 ,  H03M7/30

CPC classification number: H03M7/4087 ,  H03M7/3088 ,  H03M7/6005 ,  H03M7/6017

Abstract: Apparatus and systems, including computer program products, implementing and using techniques for predicate application using partial compression dictionary match. A search strategy is developed for each predicate to be applied to compressed data. The compressed data is searched using the search strategy to locate the compression symbols identified in the search strategy. In response to locating a compression symbol from the search strategy in the compressed data, a respective row and applying the predicate is decompressed and a respective row that matches the predicate is returned to a database engine or an application.

公开(公告)号：US09780805B2

公开(公告)日：2017-10-03

申请号：US14520485

申请日：2014-10-22

Applicant: International Business Machines Corporation

Inventor： Ian R. Finlay

IPC: H03M7/40 ,  H03M7/30

CPC classification number: H03M7/4087 ,  H03M7/3088 ,  H03M7/6005 ,  H03M7/6017

Abstract: Methods and apparatus, including computer program products, implementing and using techniques for predicate application using partial compression dictionary match. A search strategy is developed for each predicate to be applied to compressed data. The compressed data is searched using the search strategy to locate the compression symbols identified in the search strategy. In response to locating a compression symbol from the search strategy in the compressed data, a respective row and applying the predicate is decompressed and a respective row that matches the predicate is returned to a database engine or an application.

公开(公告)号：US20170134041A1

公开(公告)日：2017-05-11

申请号：US15073124

申请日：2016-03-17

Applicant: International Business Machines Corporation

Inventor： Frank Haverkamp ,  Anthony T. Sofia ,  Joerg-Stephan Vogt

IPC: H03M7/30 ,  H04L29/06

CPC classification number: G06F16/1744 ,  H03M7/30 ,  H03M7/3088 ,  H03M7/6017 ,  H04L29/0604 ,  H04L69/04

Abstract: A computer program product for data compression is provided. The computer program product includes a computer readable storage medium having program instructions embodied therewith. The program instructions are readable and executable by a processing circuit to cause the processing circuit to execute software compression for first requests for data compression that have respective sizes below a predefined threshold, forward second requests for data compression having respective sizes above the predefined threshold to a hardware accelerator and maintain a persistence of a compression dictionary used for executing the second requests across executions of the first and second requests.

公开(公告)号：US20170109057A1

公开(公告)日：2017-04-20

申请号：US15270182

申请日：2016-09-20

Applicant: Sinan Karaca

Inventor： Sinan Karaca

IPC: G06F3/06 ,  G06F9/44 ,  G06F12/02

CPC classification number: H03M7/6017 ,  G06F16/1727 ,  G06F16/1744 ,  H03M7/3091

Abstract: The present invention overcomes deficiencies inherent in data compression in computer systems running the Microsoft Windows operating system, and accelerates disk read speeds.

公开(公告)号：US09600420B2

公开(公告)日：2017-03-21

申请号：US14526868

申请日：2014-10-29

Applicant: QUALCOMM Incorporated

Inventor： Andres Alejandro Oportus Valenzuela ,  Richard Senior ,  Raghuveer Raghavendra ,  Nieyan Geng ,  Gurvinder Singh Chhabra

IPC: G06F12/00 ,  G06F12/12 ,  G06F12/10 ,  H03M7/30 ,  G06F12/08

CPC classification number: G06F12/12 ,  G06F12/08 ,  G06F12/1009 ,  G06F2212/401 ,  H03M7/30 ,  H03M7/6017 ,  H03M7/6023 ,  H03M7/702

Abstract: Aspects include computing devices, systems, and methods for implementing executing decompression of a compressed page. A computing device may determine a decompression block of a compressed page that contains a code instruction requested in a memory access request. Decompression blocks, other than the decompression block containing the requested code instruction, may be selected for decompression based on being situated between an end of the compressed page and the decompression block containing the requested code instruction. Decompression blocks not identified for decompression may be substituted for a fault or exception code. The computing device may decompress decompression blocks identified for decompression, starting at the end of the compressed page and terminating the decompression of the compressed page upon filling all blocks with decompressed blocks, faults, or exception code. The remaining decompression blocks of the compressed page may be decompressed after or concurrently with the execution of the requested code instruction.