Method for dry fermentation and equipment for carrying out the same
    51.
    发明授权
    Method for dry fermentation and equipment for carrying out the same 失效
    干发酵方法及其进行设备

    公开(公告)号:US07820429B2

    公开(公告)日:2010-10-26

    申请号:US11571175

    申请日:2005-07-14

    摘要: The present invention relates to a method for dry fermentation and equipment for carrying out the same. The invention equipment comprises a fermentation tank for dry fermentation which includes a tank body 5 for accommodating materials, a flexible sealing membrane 7 for covering said tank body 5, and a tight fixing means 3 for hermetically covering the tank body 5 with the flexible sealing membrane 7. This invention is characterized in that said tank body 5 is provided with a top opening 2 at its top part and at least one side opening 4 for loading and unloading materials at its side portions. When the tank body 5 is covered hermetically by the flexible sealing membrane 7, said tight fixing means 3 makes the contact area 6 between the tank body 5 and the flexible sealing membrane 7 form at least one sealing contacting strip or at least one sealing line which is continuous and close in three-dimensional space so that the flexible sealing membrane 7 covers hermetically both the top opening 2 and at least one side opening 4 for loading and unloading materials.

    摘要翻译: 本发明涉及一种干发酵方法及其设备。 本发明的设备包括用于干发酵的发酵罐,其包括用于容纳材料的罐体5,用于覆盖所述罐体5的柔性密封膜7和用于通过柔性密封膜气密地覆盖罐体5的紧固固定装置3 本发明的特征在于,所述罐体5在其顶部设置有顶部开口2和至少一个用于在其侧部装载和卸载材料的侧面开口4。 当罐体5被柔性密封膜7气密地覆盖时,所述紧固固定装置3使得罐体5和柔性密封膜7之间的接触区域6形成至少一个密封接触条或至少一条密封线, 在三维空间中连续紧密,使得柔性密封膜7气密地覆盖顶部开口2和用于装载和卸载材料的至少一个侧面开口4。

    Equipment and Method for Dry Ferment
    52.
    发明申请
    Equipment and Method for Dry Ferment 失效
    干发酵设备和方法

    公开(公告)号:US20080248541A1

    公开(公告)日:2008-10-09

    申请号:US11571175

    申请日:2005-07-14

    IPC分类号: C12P1/00 C12M1/00

    摘要: The present invention relates to a method for dry fermentation and equipment for carrying out the same. The invention equipment comprises a fermentation tank for dry fermentation which includes a tank body 5 for accommodating materials, a flexible sealing membrane 7 for covering said tank body 5, and a tight fixing means 3 for hermetically covering the tank body 5 with the flexible sealing membrane 7. This invention is characterized in that said tank body 5 is provided with a top opening 2 at its top part and at least one side opening 4 for loading and unloading materials at its side portions. When the tank body 5 is covered hermetically by the flexible sealing membrane 7, said tight fixing means 3 makes the contact area 6 between the tank body 5 and the flexible sealing membrane 7 form at least one sealing contacting strip or at least one sealing line which is continuous and close in three-dimensional space so that the flexible sealing membrane 7 covers hermetically both of the top opening 2 and at least one side opening 4 for loading and unloading materials.

    摘要翻译: 本发明涉及一种干发酵方法及其设备。 本发明的设备包括用于干发酵的发酵罐,其包括用于容纳材料的罐体5,用于覆盖所述罐体5的柔性密封膜7和用于通过柔性密封膜气密地覆盖罐体5的紧固固定装置3 本发明的特征在于,所述罐体5在其顶部设置有顶部开口2和至少一个用于在其侧部装载和卸载材料的侧面开口4。 当罐体5被柔性密封膜7气密地覆盖时,所述紧固固定装置3使得罐体5和柔性密封膜7之间的接触区域6形成至少一个密封接触条或至少一条密封线, 在三维空间中连续紧密,使得柔性密封膜7气密地覆盖顶部开口2和用于装载和卸载材料的至少一个侧面开口4。

    ELECTRIC POWER CONVERSION SYSTEM
    54.
    发明申请

    公开(公告)号:US20210126523A1

    公开(公告)日:2021-04-29

    申请号:US17139781

    申请日:2020-12-31

    申请人: Tong Chen

    发明人: Tong Chen

    IPC分类号: H02M1/32 G08B21/02 G01R31/52

    摘要: Disclosed is a power conversion system for notifying electrical faults and protection against electrical shocks. The power conversion system includes a first circuit having a primary winding; a second circuit having a secondary winding, and a core, wherein the primary winding and the secondary winding are coiled around the core. The power conversion system further includes an impedance and a detection module in series bridged to the first circuit and the second circuit forming the third circuit. The detection module is configured to detect any fault electrical current flowing from the first circuit to the second circuit via the third circuit. The detection module is connected to an alert unit for indicating the presence of fault current in the third circuit and optionally the detector module may also connect to a circuit breaker.

    Managing multiple speculative assist threads at differing cache levels
    56.
    发明授权
    Managing multiple speculative assist threads at differing cache levels 失效
    管理不同缓存级别的多个投机辅助线程

    公开(公告)号:US08656142B2

    公开(公告)日:2014-02-18

    申请号:US12903620

    申请日:2010-10-13

    申请人: Tong Chen Yaoqing Gao

    发明人: Tong Chen Yaoqing Gao

    IPC分类号: G06F9/30

    CPC分类号: G06F12/0862

    摘要: An illustrative embodiment provides a computer-implemented process for managing multiple speculative assist threads for data pre-fetching that sends a command from an assist thread of a first processor to second processor and a memory, wherein parameters of the command specify a processor identifier of the second processor, responsive to receiving the command, reply by the second processor indicating an ability to receive a cache line that is a target of a pre-fetch, responsive to receiving the command replying by the memory indicating a capability to provide the cache line, responsive to receiving replies from the second processor and the memory, sending, by the first processor, a combined response to the second processor and the memory, wherein the combined response indicates an action, and responsive to the action indicating a transaction can continue sending the requested cache line, by the memory, to the second processor into a target cache level on the second processor.

    摘要翻译: 示例性实施例提供了一种用于管理用于数据预取的多个推测辅助线程的计算机实现的过程,其将命令从第一处理器的辅助线程发送到第二处理器和存储器,其中该命令的参数指定处理器标识符 第二处理器,响应于接收到所述命令,响应于接收到指示提供所述高速缓存行的能力的由所述存储器回复的命令,所述第二处理器的指示接收作为所述预取的目标的高速缓存行的能力, 响应于从所述第二处理器和所述存储器接收到的答复,由所述第一处理器发送对所述第二处理器和所述存储器的组合响应,其中所述组合响应指示动作,并且响应于所述动作指示事务可以继续发送 所述存储器将所请求的高速缓存行提供给所述第二处理器到所述第二处理器上的目标高速缓存级别。

    Spectrum Sliced Photonic Signal Processor
    57.
    发明申请
    Spectrum Sliced Photonic Signal Processor 有权
    光谱切片光子信号处理器

    公开(公告)号:US20120113494A1

    公开(公告)日:2012-05-10

    申请号:US13383140

    申请日:2010-07-08

    IPC分类号: G02B26/00

    摘要: A photonic signal processor providing finite impulse response filtering of an external input signal, the processor including: a photonic signal input having a predetermined wavelength range, a Bragg grating structure interconnected to the photonic signal input and having a series of localised modifications to the periodicity of the grating structure so as to provide a predetermined transmission output window within the stopband of the Bragg grating structure and predetermined wavelength range; a modulator interconnected to the grating structure for modulating the output from the grating structure in accordance with the external signal input; a delay structure for providing a wavelength variable delay to the output from the modulator; an intensity detector interconnected to the delay structure for determining and outputting the intensity of the delay structure output.

    摘要翻译: 提供对外部输入信号的有限脉冲响应滤波的光子信号处理器,所述处理器包括:具有预定波长范围的光子信号输入,与所述光子信号输入互连的布拉格光栅结构,并且具有对所述光子信号周期的周期性的一系列局部修改 光栅结构,以便在布拉格光栅结构的阻挡带和预定波长范围内提供预定的透射输出窗口; 互连到光栅结构的调制器,用于根据外部信号输入调制光栅结构的输出; 用于向调制器的输出提供波长可变延迟的延迟结构; 互连到延迟结构的强度检测器,用于确定和输出延迟结构输出的强度。

    Semiconductor local interconnect and contact
    60.
    发明申请
    Semiconductor local interconnect and contact 有权
    半导体局部互连和接触

    公开(公告)号:US20050130402A1

    公开(公告)日:2005-06-16

    申请号:US11045202

    申请日:2005-01-27

    摘要: An integrated circuit is provided. A gate dielectric and a gate are provided respectively on and over a semiconductor substrate. A junction is formed adjacent the gate dielectric and a shaped spacer is formed around the gate. A spacer is formed under the shaped spacer and a liner is formed under the spacer. A first dielectric layer is formed over the semiconductor substrate, the shaped spacer, the spacer, the liner, and the gate. A second dielectric layer is formed over the first dielectric layer. A local interconnect opening is formed in the second dielectric layer down to the first dielectric layer. The local interconnect opening in the first dielectric layer is opened to expose the junction in the semiconductor substrate and the first gate. The local interconnect openings in the first and second dielectric layers are filled with a conductive material.

    摘要翻译: 提供集成电路。 分别在半导体衬底上和上方提供栅极电介质和栅极。 在栅极电介质附近形成接合部,并且在栅极周围形成成形间隔物。 间隔件形成在成形间隔件下方,衬垫形成在间隔件下方。 第一电介质层形成在半导体衬底,成形间隔物,间隔物,衬垫和栅极上。 在第一电介质层上形成第二电介质层。 局部互连开口形成在第二电介质层中,直到第一电介质层。 打开第一介电层中的局部互连开口以暴露半导体衬底和第一栅极中的结。 第一和第二介电层中的局部互连开口用导电材料填充。