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公开(公告)号:US10199269B2
公开(公告)日:2019-02-05
申请号:US15361503
申请日:2016-11-28
Applicant: UNITED MICROELECTRONICS CORP.
Inventor: Li-Han Chen , Yen-Tsai Yi , Chun-Chieh Chiu , Min-Chuan Tsai , Wei-Chuan Tsai , Hsin-Fu Huang
IPC: H01L23/485 , H01L21/768 , H01L23/535 , H01L23/532 , H01L29/08 , H01L29/161 , H01L29/16 , H01L29/165 , H01L29/24 , H01L29/267 , H01L29/78
Abstract: A conductive structure includes a substrate including a first dielectric layer formed thereon, at least a first opening formed in the first dielectric layer, a low resistive layer formed in the opening, and a first metal bulk formed on the lower resistive layer in the opening. The first metal bulk directly contacts a surface of the first low resistive layer. The low resistive layer includes a carbonitride of a first metal material, and the first metal bulk includes the first metal material.
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52.
公开(公告)号:US20180337187A1
公开(公告)日:2018-11-22
申请号:US16028364
申请日:2018-07-05
Inventor: Chih-Chieh Tsai , Pin-Hong Chen , Tzu-Chieh Chen , Tsun-Min Cheng , Yi-Wei Chen , Hsin-Fu Huang , Chi-Mao Hsu , Shih-Fang Tzou
IPC: H01L27/108
Abstract: A semiconductor structure for preventing row hammering issue in DRAM cell is provided in the present invention. The structure includes a trench with a gate dielectric, an n-type work function metal layer, a TiN layer conformally formed within, and a buried word line filled in the trench.
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公开(公告)号:US10068797B2
公开(公告)日:2018-09-04
申请号:US15586240
申请日:2017-05-03
Applicant: UNITED MICROELECTRONICS CORP.
Inventor: Pin-Hong Chen , Kuo-Chih Lai , Chia Chang Hsu , Chun-Chieh Chiu , Li-Han Chen , Shu Min Huang , Min-Chuan Tsai , Hsin-Fu Huang , Chi-Mao Hsu
IPC: H01L21/4763 , H01L21/768 , H01L21/285 , H01L23/532
Abstract: A semiconductor process for forming a plug includes the following steps. A dielectric layer having a recess is formed on a substrate. A titanium layer is formed to conformally cover the recess. A first titanium nitride layer is formed to conformally cover the titanium layer, thereby the first titanium nitride layer having first sidewall parts. The first sidewall parts of the first titanium nitride layer are pulled back, thereby second sidewall parts being formed. A second titanium nitride layer is formed to cover the recess. Moreover, a semiconductor structure formed by said semiconductor process is also provided.
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公开(公告)号:US10043811B1
公开(公告)日:2018-08-07
申请号:US15627455
申请日:2017-06-20
Inventor: Chih-Chieh Tsai , Pin-Hong Chen , Tzu-Chieh Chen , Tsun-Min Cheng , Yi-Wei Chen , Hsin-Fu Huang , Chi-Mao Hsu , Shih-Fang Tzou
IPC: H01L27/108
Abstract: A semiconductor structure for preventing row hammering issue in DRAM cell is provided in the present invention. The structure includes a trench with a gate dielectric, an n-type work function metal layer, a TiN layer conformally formed within, and a buried word line filled in the trench.
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公开(公告)号:US09570348B2
公开(公告)日:2017-02-14
申请号:US14709083
申请日:2015-05-11
Applicant: United Microelectronics Corp.
Inventor: Pin-Hong Chen , Kuo-Chih Lai , Chia-Chang Hsu , Chun-Chieh Chiu , Li-Han Chen , Shu-Min Huang , Min-Chuan Tsai , Hsin-Fu Huang , Chi-Mao Hsu
IPC: H01L21/768
CPC classification number: H01L21/76895 , H01L21/28518 , H01L21/76805 , H01L21/76816 , H01L21/76843 , H01L21/76855 , H01L21/76889 , H01L21/76897 , H01L23/485 , H01L23/53223 , H01L23/53238 , H01L23/53266
Abstract: A method of forming a contact structure is provided. A silicon-containing substrate is provided with a composite dielectric layer formed thereon. An opening penetrates through the composite dielectric layer and exposes a portion of the source/drain region. A titanium nitride layer is formed in the opening, and the titanium nitride layer is in contact with the exposed portion of the source/drain region. The titanium nitride layer is annealed, so that the bottom portion of the titanium nitride layer is partially transformed into a titanium silicide layer. A conductive layer is formed to fill up the opening.
Abstract translation: 提供一种形成接触结构的方法。 含硅基板上形成有复合电介质层。 开口穿过复合介电层并暴露出源/漏区的一部分。 在开口中形成氮化钛层,氮化钛层与源极/漏极区域的露出部分接触。 将氮化钛层退火,使得氮化钛层的底部部分转变为硅化钛层。 形成导电层以填充开口。
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