-
公开(公告)号:US11730433B2
公开(公告)日:2023-08-22
申请号:US17529543
申请日:2021-11-18
Applicant: STMicroelectronics (Crolles 2) SAS , STMicroelectronics SA
Inventor: Gilles Gasiot , Severin Trochut , Olivier Le Neel , Victor Malherbe
CPC classification number: A61B6/4208 , G01T1/24
Abstract: An X-ray detector includes a first circuit with an NPN-type bipolar transistor and a second circuit configured to compare a voltage at a terminal of the NPN-type bipolar transistor with a reference value substantially equal to a value of the terminal voltage which would occur when the first circuit has been exposed to a threshold quantity of X-rays.
-
公开(公告)号:US20230223948A1
公开(公告)日:2023-07-13
申请号:US18069459
申请日:2022-12-21
Applicant: STMicroelectronics SA , STMicroelectronics (Genoble2) SAS
Inventor: Julien Goulier , Franck Montaudon
CPC classification number: H03M1/124 , H04B5/0031
Abstract: The present disclosure concerns an electronic device connected to an antenna. The electronic device delivers a first amplitude-modulated analog signal of a signal captured by the antenna, the capture signal associated with an electromagnetic field exhibiting intervals at a minimum level. The electronic device includes a first circuit, a second circuit, and a third circuit. The first circuit delivers a second analog signal by rectification and filters the first analog signal. The second circuit delivers a first binary signal based on the demodulation of the second analog signal. The third circuit couples the antenna to a resistor during each pause. The resistance value of the resistor depends on the maximum amplitude of the electromagnetic field before the pause.
-
公开(公告)号:US20230134367A1
公开(公告)日:2023-05-04
申请号:US18146572
申请日:2022-12-27
Applicant: STMicroelectronics SA
Inventor: Vincent Knopik
IPC: H01F27/28 , H01L23/522 , H03H7/42 , H01F27/29 , H01F38/14 , H01F41/04 , H01F41/10 , H01Q1/24 , H01Q1/36 , H01Q1/48 , H01Q1/50 , H01Q7/00
Abstract: A transformer of the symmetric-asymmetric type includes comprising a primary inductive circuit and a secondary inductive circuit formed in a same plane by respective interleaved and stacked metal tracks. A first crossing region includes a pair of connection plates facing one another, with each connection plate having a rectangular shape that is wider than the metal tracks, and diagonally connected to tracks of the secondary inductive circuit.
-
公开(公告)号:US11641523B2
公开(公告)日:2023-05-02
申请号:US17452512
申请日:2021-10-27
Applicant: STMicroelectronics (Grenoble 2) SAS , STMicroelectronics SA
Inventor: Arnaud Bourge , Tarek Lule , Gregory Roffet
IPC: H04N5/235 , H04N5/355 , H04N5/353 , H01L27/146
Abstract: An image sensor includes a plurality of pixels, where each of the plurality of pixels includes a photodiode. The image sensor is configured to capture images of a scene exposed with a flickering light source by for each of the plurality of pixels, acquiring a value representative of a light level at a corresponding pixel by gradually varying a value of sensitivity of the corresponding pixel.
-
685.
公开(公告)号:US11641217B2
公开(公告)日:2023-05-02
申请号:US17421589
申请日:2019-01-22
Applicant: STMICROELECTRONICS SA , INSTITUT POLYTECHNIQUE DE BORDEAUX , CENTRE NATIONAL DE LA RECHERCHE SCIENTIFIQUE , UNIVERSITE DE BORDEAUX
Inventor: Jeremie Forest , Vincent Knopik , Eric Kerherve
Abstract: In an embodiment method, a hybrid coupler comprises a first input receiving an analog signal, a second input receiving an additional analog signal phase shifted by 90° from the analog signal, and first and second outputs. The method comprises injecting into the second output a test signal having an initial test phase, iteratively generating a current test phase for the test signal, from the initial test phase to a final test phase equal to the initial test phase increased by at least one portion of one complete revolution, and, in each iteration, measuring the current peak value of the first output, and storing the current test phase and the current peak value as a maximum/minimum peak value if there is not a stored maximum/minimum peak value higher/lower than the current peak value, respectively, and determining a phase of the analog signal from the stored test phase.
-
公开(公告)号:US20230079355A1
公开(公告)日:2023-03-16
申请号:US17987280
申请日:2022-11-15
Applicant: STMicroelectronics SA , STMicroelectronics, Inc. , STMicroelectronics (Research & Development) Limited
Inventor: Darin K. Winterton , Donald Baxter , Andrew Hodgson , Gordon Lunn , Olivier Pothier , Kalyan-Kumar Vadlamudi-Reddy
IPC: H04N5/232
Abstract: A method includes dividing a field of view into a plurality of zones and sampling the field of view to generate a photon count for each zone of the plurality of zones, identifying a focal sector of the field of view and analyzing each zone to select a final focal object from a first prospective focal object and a second prospective focal object.
-
公开(公告)号:US11581303B2
公开(公告)日:2023-02-14
申请号:US16869840
申请日:2020-05-08
Applicant: STMicroelectronics SA
Inventor: Louise De Conti , Philippe Galy
Abstract: An electronic circuit includes a first electronic component formed above a buried insulating layer of a substrate and a second electronic component formed under the buried insulating layer. The insulating layer is thoroughly crossed by a semiconductor well. The semiconductor well electrically couples a terminal of the first electronic component to a terminal of the second electronic component.
-
公开(公告)号:US11563424B2
公开(公告)日:2023-01-24
申请号:US17496548
申请日:2021-10-07
Applicant: STMICROELECTRONICS SA
Inventor: Jeremie Forest , Vincent Knopik
IPC: H03H11/16 , H03F3/24 , H04B1/3827 , H04W84/04
Abstract: In an embodiment, a method for determining the phase shift between a first signal and a second signal includes: delivering the first signal to a first input of a 90° hybrid coupler; delivering the second signal to a second input of the 90° hybrid coupler; determining a first piece of information relating to a power of a first output signal delivered to a first output of the 90° hybrid coupler; determining a second piece of information relating to a power of a second output signal delivered to a second output of the coupler; and adjusting the phase of the second signal until obtaining a calibrated phase for which the first piece of information is substantially equal to the second piece of information, wherein the first and second signals have identical frequencies, and wherein the phase shift between the first signal and the second signal is equal to the calibrated phase.
-
公开(公告)号:US20220360236A1
公开(公告)日:2022-11-10
申请号:US17662542
申请日:2022-05-09
Applicant: STMICROELECTRONICS SA
Inventor: Samia Ouyahia , Renaud Lemoine , Eric Wilhelm
Abstract: According to an embodiment, An integrated circuit comprising a first cascode radio frequency (RF) power amplifier that includes a first common source transistor having a gate configured to receive a first RF signal, and a source connected to a neutral point; a first common gate transistor having a gate and a drain connected to a power source node, and a source connected to a drain of the first common source transistor; and a first resistor coupled between a bulk of the first common gate transistor and a first bulk bias node configured to provide a voltage that is greater than or equal to a voltage at the source of the first common gate transistor, wherein the first resistor is configured to obtain a floating point.
-
公开(公告)号:US11444077B2
公开(公告)日:2022-09-13
申请号:US16696045
申请日:2019-11-26
Applicant: STMicroelectronics SA
Inventor: Jean Jimenez , Boris Heitz , Johan Bourgeat , Agustin Monroy Aguirre
Abstract: A semiconductor device includes a thyristor disposed in a semiconductor body. The thyristor has an anode, a cathode, a first bipolar transistor located on an anode side, and a second bipolar transistor located on a cathode side. The first and second bipolar transistors are nested and connected between the anode and the cathode. A MOS transistor is disposed in the semiconductor body. The MOS transistor is coupled between a collector region and an emitter region of the second bipolar transistor. The MOS transistor has a gate region connected to the cathode via a resistive semiconductor region that incorporates at least a part of a base region of the second bipolar transistor.
-
-
-
-
-
-
-
-
-