Abstract:
An edge terminal structure of a power semiconductor device includes a second conductive-type substrate, a first conductive-type buffer layer, a first conductive-type epitaxial layer, a first and a second electrodes, and a first and a second field plates. A trench is in a surface of the first conductive-type epitaxial layer in an edge terminal area beside an active area of the power semiconductor device. The first field plate includes at least a L-shaped electric-plate, a gate insulation layer under the L-shaped electric-plate, and the first electrode on the L-shaped electric-plate. The second field plate includes a portion of the first electrode and at least an insulation layer between the portion of the first electrode and the first conductive-type epitaxial layer. The insulation layer covers the tail of the trench and completely covers the L-shaped electric-plate.
Abstract:
A voltage converter including a constant turned-on time signal generator, a first transistor, a second transistor, an inductor, a ripple signal compensator, and a ripple injection circuit is provided. The ripple signal compensator is coupled to an output terminal of the voltage converter and a second terminal of the first transistor, and generates an adjusted ripple signal according to a switching voltage on a second terminal of the first transistor and an output signal of the voltage converter. The ripple rejection circuit generates a ripple injection signal according to the adjusted ripple signal. Wherein, the constant turned-on time signal generator generates a first and second driving signals for respectively driving the first and second transistors according to the ripple injection signal.
Abstract:
An edge terminal structure of a power semiconductor device is provided that includes a substrate, a first and a second electrodes disposed on a surface and a back of the substrate respectively, a first field plate, and a second field plate. The power semiconductor device includes an active area and an edge termination area, and there is a trench in a surface of the substrate in the edge terminal area beside the active area. The first field plate is disposed on a sidewall of the trench and extends on a tail of the trench, and it includes at least a L-shaped electric-plate, a gate insulation layer under the L-shaped electric-plate, and the first electrode on the L-shaped electric-plate. The second field plate includes at least an insulation layer and the first electrode thereon. The insulation layer covers the tail of the trench and a tail of the L-shaped electric-plate further.
Abstract:
A voltage converter is disclosed. The voltage converter includes a constant on time signal generator, a first and second transistors, an inductor, a feedback circuit and a ripple injection circuit. The constant on time signal generator generates a first and second driving signals for driving the first and second transistors. The voltage converter generates an output signal at an output end thereof. The feedback circuit divides the output signal to generate a feedback signal at a feedback end of the voltage converter. The ripple injection circuit gets the voltage of the feedback end and the voltage of the phase end to generate a injection signal. The constant on time signal generator generates the first and second driving signals according to the injection signal, the output signal and a reference signal.
Abstract:
A voltage converter includes a constant on time signal generator, a first transistor, a second transistor, an inductor, and a ripple injection circuit. The constant on time signal generator generates a first driving signal and a second driving signal. The ripple injection circuit receives an output signal and generates a ripple injection signal. The constant on time signal generator generates the first and second driving signals according to the ripple injection signal, the output signal, and a reference signal.
Abstract:
A structure of a fly-back power converting apparatus is disclosed. The structure includes a power transistor, a current detector, a pulse width modulation (PWM) signal generator and a current limiter. The power transistor is coupled to an input voltage and receives a PWM signal. The current detector detects a current output from the power transistor and generates a detecting voltage according to the current. The PWM signal generator generates the PWM signal according to a comparing result by comparing the detecting voltage and a standard voltage. The current limiter generates the standard voltage according to a turn-on time of the power transistor.
Abstract:
A buck voltage converting apparatus is disclosed. The buck voltage converting apparatus includes a first transistor, a second transistor, an inductor, a controller and a switch. The first transistor receives an input voltage. A first terminal of the inductor is coupled to the first and second transistors. A second terminal of the inductor is coupled to an output terminal of the buck voltage converting apparatus for generating an output voltage. The controller receives the output voltage, and generates a detection voltage according to voltage amplitude of the output voltage. The switch is coupled between a first terminal of the first transistor and a control terminal of the second transistor. The switch is turned on or off according to the detection voltage.
Abstract:
A voltage converting apparatus and a sub-harmonic detector are disclosed. The sub-harmonic detector includes a pulse eliminating circuit, a counter, and a comparator. The pulse eliminating circuit receives a pulse width modulation (PWM) signal and a reference PWM signal having a same period. The PWM signal and reference PWM signal has a plurality of pulses and reference pulses respectively. The pulse eliminating circuit eliminates at least one part of the pulses which overlap with the reference pulses for generating a processed signal. The counter counts the processed signal and the PWM signal during a time period to obtain first and second counting values. The comparator compares the first and second counting values for detecting whether a sub-harmonic condition happens or not in the PWM signal.
Abstract:
An edge terminal structure of a power semiconductor device is provided that includes a substrate, a first and a second electrodes disposed on a surface and a back of the substrate respectively, a first field plate, and a second field plate. The power semiconductor device includes an active area and an edge termination area, and there is a trench in a surface of the substrate in the edge terminal area beside the active area. The first field plate is disposed on a sidewall of the trench and extends on a tail of the trench, and it includes at least a L-shaped electric-plate, a gate insulation layer under the L-shaped electric-plate, and the first electrode on the L-shaped electric-plate. The second field plate includes at least an insulation layer and the first electrode thereon. The insulation layer covers the tail of the trench and a tail of the L-shaped electric-plate further.
Abstract:
A driving device for a LED module is provided. The driving device for the LED module includes a voltage converting unit, a LED module voltage detecting unit, and a switching signal generation unit. The voltage converting unit produces a driving voltage to drive the LED module according to a switching signal. The LED module voltage detecting unit divides the driving voltage to produce a comparison voltage. The switching signal generation unit receives the comparison voltage by a fault detection pin and compares a reference voltage and the comparison voltage to enable or disable the switching signal. After the switching signal is disabled, the switching signal generation unit further pulls up a voltage level of the fault detection pin to a logic high level voltage, so as to produce a fault notification signal to let the fault detection pin also have a function for fault notification.