Abstract:
A delay circuit comprising a delay measurement unit, a delay mapping unit and a map delay module. The delay measurement unit generates a mapping table according to a reference signal and a reference clock signal. The delay mapping unit generates a mapped delay selection signal according to an input selection signal and at least a mapping value from the mapping table. The map delay module delays an input data signal to generate an output data signal according to the mapped delay selection signal.
Abstract:
A video compression circuit including a video pre-processor, a macroblock data storage unit and a video processor is provided. When fulfilled by an input video signal, the video pre-processor converts the input video signal to generate a macroblock data. The macroblock data storage unit alternatively and temporally stores the macroblock data generated from the video pre-processor. The video processor alternatively reads the macroblock data stored in the macroblock data storage unit, and compresses the readout macroblock data to an output video signal.
Abstract:
The present invention provides a tartrate salt of Formula (I), Formula I is also known as (7S)-7-[(5-fluoro-2-methyl-benzyl)oxy]-2-[(2R)-2-methylpiperazin-1-yl]-6,7-dihydro-5H-cyclopenta[b]pyridine. The tartrate salt is preferably crystalline. The tartrate salt of Formula I of the invention is useful in the treatment of diseases linked to activation of the 5HT2c receptor in animals including humans, for example, in the treatment of schizophrenia, cognitive deficits including cognitive deficits associated with schizophrenia, anxiety, depression, obsessive-compulsive disorder, epilepsy, obesity, sexual dysfunction, and urinary incontinence, among others.
Abstract:
A delay circuit comprising a delay measurement unit, a delay mapping unit and a map delay module. The delay measurement unit generates a mapping table according to a reference signal and a reference clock signal. The delay mapping unit generates a mapped delay selection signal according to an input selection signal and at least a mapping value from the mapping table. The map delay module delays an input data signal to generate an output data signal according to the mapped delay selection signal.
Abstract:
An adhesive tape cutter comprising a pair of protecting portions formed in pair at the right and left sides for fitting and cutting an adhesive tape roll. The top of the protecting portions includes a tape-guiding slot and a tape-attaching portion while a slide slot portion is formed at a side wall of the protecting portions. The slide cap is fitted with a cutting edge, and the slide cap further includes a sliding piece that fits into the slide slot portion in such a manner that a proper sliding action is achieved. An elastic supporting piece is integrally formed within a tape-receiving space defined by the protecting portions such that that the elastic supporting piece can be pushed against the adhesive tape roll at any time. In this way, a certain clamping relationship between the adhesive tape roll and the protecting portions is constantly maintained.
Abstract:
A magnetomechanical tag for use in an electronic article surveillance (EAS) system and a method of manufacturing the magnetomechanical tag may be provided. The EAS may include at least one resonator, a housing configured to allow vibration therein of the at least one resonator and a cover heat sealed to the housing at a heat sealing temperature. The EAS tag further may include a powder lubricant within the housing. The powder lubricant may have a melting temperature less the heat sealing temperature.
Abstract:
An integrated circuit package comprising a semiconductor device and pins is provided. The semiconductor device comprises first and second scan chains, each having an input port and an output port. The semiconductor device further comprises at least two first pads, at least two second pads, and a connecting device. The at least two first pads are coupled to the input port of the first scan chain and the output port of the second scan chain, respectively. The at least two second pads are coupled to the output port of the first scan chain and the input port of the second scan chain, respectively. The connecting device is coupled between the first and the second chains, and is capable of controlling electrical connection between the input port of the second scan chain and the output port of the first scan chain. When the connecting device is disabled, the input port of the second scan chain is electrically disconnected from the output port of the first scan chain. The first pads are electrically connected to the pins and the second pads are not electrically connected to any pins of the integrated circuit package.
Abstract:
Level shifters capable of setting logic level of the output signals thereof to a pre-defined known state during power-up are provided, in which a first logic unit is powered by a first power voltage, receives input signals with a core power voltage and comprises first and second output terminals. First and second drivers are coupled between the first output terminal and the first power voltage and between the second output terminal and the second power voltage respectively. When one of the first and second power voltages is not ready during power-up, the first driver matches a voltage level on the first output terminal with the first power voltage by AC coupling and the second driver pulls low or maintains a voltage level on the second output terminal.
Abstract:
A write signal control circuit in an optical disk drive for adjusting the duty cycle of the write signals by a duty cycle adjusting unit. The write signal control circuit includes a write signal generator for converting an EFM signal into the write signals according to the write strategy waveform generating rules, a duty cycle adjusting unit for adjusting the duty cycle of each write signal according to adjusting parameters and for outputting adjusted write signals, and a duty cycle detector for detecting the duty cycle of each adjusted write signal and outputting a respective duty cycle control signal. The duty cycle adjusting unit further receives the duty cycle control signal to adapt the adjusting parameters.
Abstract:
A ferromagnetic resonator for use in a marker in a magnetomechanical electronic article surveillance system is manufactured at reduced cost by being continuously annealed with a tensile stress applied along the ribbon axis and by providing an amorphous magnetic alloy containing iron, cobalt and nickel and in which the portion of cobalt is less than about 4 at %.