PROTECTION OF DATA PROCESSED BY AN ENCRYPTION ALGORITHM

    公开(公告)号:US20220414268A1

    公开(公告)日:2022-12-29

    申请号:US17850497

    申请日:2022-06-27

    Abstract: The present disclosure relates to a method for protecting a first data item applied to a cryptographic algorithm, executed by a processor, wherein said algorithm is a per-round algorithm, with each round processing contents of first, second and third registers, the content of the second register being masked, during first parity rounds, by the content of a fourth register and the content of the third register being masked, during second parity rounds, by the content of a fifth register.

    Integrated capacitive element and corresponding production method

    公开(公告)号:US11538941B2

    公开(公告)日:2022-12-27

    申请号:US17196226

    申请日:2021-03-09

    Abstract: An integrated circuit includes a first semiconductor well contained in a semiconductor substrate and a second semiconductor well contained in the first semiconductor well. A capacitive element for the integrated circuit includes a first electrode and a second electrode, where the first electrode includes at least one vertical conductive structure filling a trench extending vertically into the first semiconductor well. The vertical conductive structure is electrically isolated from the first semiconductor well by a dielectric envelope covering a base and the sides of the trench. The vertical conductive structure penetrates into the second semiconductor well at least at one longitudinal end of the trench. The second electrode includes the first semiconductor well and the second semiconductor well.

    Smart card
    63.
    发明授权

    公开(公告)号:US11537834B2

    公开(公告)日:2022-12-27

    申请号:US17521524

    申请日:2021-11-08

    Inventor: Olivier Rouy

    Abstract: A smart card includes a first circuit delivering a power supply voltage and a second circuit coupled to the first circuit by an electrical conductor and powered with the power supply voltage. A light-emitting diode has a first terminal coupled to the electrical conductor and a second terminal coupled to a first terminal of the second circuit. During a first operating phase, the first circuit delivers a first value of the power supply voltage and the second circuit applies a first voltage to the first terminal. During a second operating phase, the first circuit delivers a second value of the power supply voltage and the second circuit applies a second voltage to the first terminal.

    Electromagnetic pulse detection
    65.
    发明授权

    公开(公告)号:US11531049B2

    公开(公告)日:2022-12-20

    申请号:US17322140

    申请日:2021-05-17

    Abstract: An embodiment integrated circuit includes a first electromagnetic pulse detection device that comprises a first loop antenna formed in an interconnection structure of the integrated circuit, a first end of the first antenna being connected to a first node of application of a power supply potential and a second end of the antenna being coupled to a second node of application of the power supply potential, and a first circuit connected to the second end of the first antenna and configured to output a first signal representative of a comparison of a first current in the first antenna with a first threshold.

    SWITCHED MODE POWER SUPPLY (SMPS)
    66.
    发明申请

    公开(公告)号:US20220376622A1

    公开(公告)日:2022-11-24

    申请号:US17731000

    申请日:2022-04-27

    Inventor: Sebastien Ortet

    Abstract: In an embodiment a switching power supply includes a voltage ramp generator comprising at least one output capacitor, wherein the generator is configured such that the output capacitor has a first value during a first operating cycle of a first operating mode and a second value during subsequent operating cycles of the first operating mode.

    COMMUNICATION ON AN I2C BUS
    68.
    发明申请

    公开(公告)号:US20220276972A1

    公开(公告)日:2022-09-01

    申请号:US17667515

    申请日:2022-02-08

    Abstract: The present description concerns attribution, on a communication over an I2C bus, of a first address to a first device by a second device, wherein the second device sends the first address over the I2C bus and, if the second device receives no acknowledgment data, then the first device records the first address.

    Protected electronic integrated circuit chip

    公开(公告)号:US11387197B2

    公开(公告)日:2022-07-12

    申请号:US17166156

    申请日:2021-02-03

    Abstract: An electronic integrated circuit chip includes a semiconductor substrate with a front side and a back side. A first reflective shield is positioned adjacent the front side of the semiconductor substrate and a second reflective shield is positioned adjacent the back side of the semiconductor substrate. Photons are emitted by a photon source to pass through the semiconductor substrate and bounce off the first and second reflective shields to reach a photon detector at the front side of the semiconductor substrate. The detected photons are processed in order to determine whether to issue an alert indicating the existence of an attack on the electronic integrated circuit chip.

Patent Agency Ranking