Abstract:
Embodiments of an apparatus for implementing a display port interface are disclosed. The apparatus may include a source processor and a sink processor coupled through an interface. The source processor may be operable to select a frequency from a continuous range of frequencies, and transmit data to the sink processor at the selected frequency. A phase lock circuit may be included in the sink processor. The phase lock circuit may be configured to generate a signal at the selected frequency dependent upon the transmitted data. The generated signal may be in phase with the transmitted data.
Abstract:
Methods and apparatus intelligently switching between line coding schemes based on context. In one exemplary embodiment, an High Definition Multimedia Interface (HDMI) system is configured to transmit control and video data according to an 8B/10B line coding protocol, and data island data according to TERC4 (TMDS (Transition Minimized Differential Signaling) Error Reduction Coding 4-bit). Various elements of the disclosed HDMI devices are configured to determine when a context switch occurs, and thereafter seamlessly transition between the appropriate line code protocol.
Abstract:
Methods and apparatus for harmonizing or unifying at least partly heterogeneous device profiles within electronic devices. In one embodiment, processing or protocol layers within two or more separate device profiles (such as for example the Embedded and External profiles of the UDI specification) are harmonized, thereby permitting the use of a single logical paradigm (for at least one component or process) in place of two or more heterogeneous paradigms under the prior art. In the exemplary context of the aforementioned UDI specification, only a single implementation of the link layer framing logic of a source device, and the frame parsing logic of the sink is needed. Similarly, only one set of compliance tests for this unified paradigm need be developed and implemented.
Abstract:
Methods and apparatus intelligently switching between line coding schemes based on context. In one exemplary embodiment, an High Definition Multimedia Interface (HDMI) system is configured to transmit control and video data according to an 8B/10B line coding protocol, and data island data according to TERC4 (TMDS (Transition Minimized Differential Signaling) Error Reduction Coding 4-bit). Various elements of the disclosed HDMI devices are configured to determine when a context switch occurs, and thereafter seamlessly transition between the appropriate line code protocol.
Abstract:
Methods and apparatus for the selection and/or configuration of scrambling operations to accommodate e.g., both scrambling and non-scrambling connections (such as to e.g., legacy type devices). In one embodiment, media interface devices (such as e.g., HDMI (High-Definition Multimedia Interface)) devices may provide enhanced scrambling capabilities; solutions disclosed herein provide, among other things, support for both enhanced scrambling capable devices and legacy devices, and enable a device to determine the scrambling capabilities of a connected device.
Abstract:
Embodiments of an apparatus for implementing a display port interface are disclosed. The apparatus may include a source processor and a sink processor coupled through an interface. The source processor may be operable to select a frequency from a continuous range of frequencies, and transmit data to the sink processor at the selected frequency. A phase lock circuit may be included in the sink processor. The phase lock circuit may be configured to generate a signal at the selected frequency dependent upon the transmitted data. The generated signal may be in phase with the transmitted data.
Abstract:
Methods and apparatus for the scrambling of control symbols. In one embodiment, the control symbols are associated with an HDMI interface, and the methods and apparatus are configured to scramble the symbols to as to mitigate the effects of electromagnetic interference (EMI) created by the transmission of otherwise unscrambled sequences of symbols which may contain significant “clock pattern” or other undesirable artifact.