公开(公告)号：US09225644B2

公开(公告)日：2015-12-29

申请号：US13616201

申请日：2012-09-14

申请人： Claude Basso ,  Natarajan Vaidhyanathan ,  Colin B. Verrilli

发明人： Claude Basso ,  Natarajan Vaidhyanathan ,  Colin B. Verrilli

IPC分类号： G06F15/173 ,  H04L12/743 ,  G06F15/167 ,  G06F17/30 ,  H04L29/06 ,  H04L12/28 ,  G06F13/00

CPC分类号： H04L45/7457 ,  G06F15/167 ,  G06F17/30982 ,  H04L63/101

摘要： Access control lists (ACLs) include one or more rules that each define a condition and one or more actions to be performed if the condition is satisfied. In one embodiment, the conditions are stored on a ternary content-addressable memory (TCAM), which receives a portion of network traffic, such as a frame header, and compares different portions of the header to entries in the TCAM. If the frame header satisfies the condition, the TCAM reports the match to other elements in the ACL. For certain conditions, the TCAM may divide the condition into a plurality of sub-conditions which are each stored in a row of the TCAM. To efficiently use the limited space in TCAM, the networking element may include one or more comparator units which check for special-case conditions. The comparator units may be used in lieu of the TCAM to determine whether the condition is satisfied.

摘要翻译： 访问控制列表（ACL）包括一个或多个规则，每个规则定义条件和满足条件时要执行的一个或多个操作。 在一个实施例中，条件存储在三元可内容寻址存储器（TCAM）上，该内容可寻址存储器（TCAM）接收网络业务的一部分，例如帧头，并且将头部的不同部分与TCAM中的条目进行比较。 如果帧头满足条件，则TCAM报告与ACL中其他元素的匹配。 对于某些条件，TCAM可以将条件划分为多个子条件，这些子条件各自存储在一行TCAM中。 为了有效地使用TCAM中的有限空间，网络元件可以包括一个或多个比较器单元，其检查特殊情况。 可以使用比较器单元代替TCAM来确定条件是否满足。

公开(公告)号：US09215125B2

公开(公告)日：2015-12-15

申请号：US13884664

申请日：2011-12-19

申请人： Claude Basso ,  Jean L. Calvignac ,  Chih-Jen Chang ,  Damon Philippe ,  Natarajan Vaidhyanathan ,  Colin B. Verrilli ,  Fabrice Jean Verplanken

发明人： Claude Basso ,  Jean L. Calvignac ,  Chih-Jen Chang ,  Damon Philippe ,  Natarajan Vaidhyanathan ,  Colin B. Verrilli ,  Fabrice Jean Verplanken

IPC分类号： H04L29/06 ,  G06F9/38 ,  G06F15/163 ,  G06F9/54

CPC分类号： H04L29/0653 ,  G06F9/3877 ,  G06F9/544 ,  G06F13/385 ,  G06F15/163 ,  H04L69/22

摘要： A network processor includes first communication protocol ports that each support ‘M’ minimum size packet data path traffic on ‘N’ lanes at ‘S’ Gigabits per second (Gbps) and traffic with different communication protocol units on ‘n’ additional lanes at ‘s’ Gbps. The first communication protocol ports support access to an external coprocessor using parsing logic located in each of the first communication protocol ports. The parsing logic, during a parsing period, is configured to send a request to the external coprocessor at reception of a ‘M’ size packet and to receive a response from the external coprocessor. The parsing logic sends a request maximum ‘m’ size byte word to the external coprocessor on one of the additional lanes and receives a response maximum ‘m’ size byte word from the external coprocessor on the one of the additional lanes while complying with the equation N×S/M=

摘要翻译： 网络处理器包括第一通信协议端口，每个端口以“S”千兆位/秒（Gbps）在“N”通道上支持“M”个最小尺寸分组数据路径业务，并且在“n”个附加车道上以不同的通信协议单元的流量“ s Gbps 第一通信协议端口支持使用位于每个第一通信协议端口中的解析逻辑来访问外部协处理器。 解析逻辑在解析周期期间被配置为在接收到“M”大小的分组时向外部协处理器发送请求并且从外部协处理器接收响应。 解析逻辑在附加通道之一上向外部协处理器发送请求最大“m”字节字，并在附加通道之一上从外部协处理器接收响应最大“m”字节字，同时遵循等式 N×S / M =

公开(公告)号：US08726134B2

公开(公告)日：2014-05-13

申请号：US13466940

申请日：2012-05-08

申请人： Francois Abel ,  Claude Basso ,  Jean L. Calvignac ,  Natarajan Vaidhyanathan ,  Fabrice Jean Verplanken

发明人： Francois Abel ,  Claude Basso ,  Jean L. Calvignac ,  Natarajan Vaidhyanathan ,  Fabrice Jean Verplanken

IPC分类号： H03M13/00

CPC分类号： H04L1/0079 ,  H04L1/0061 ,  H04L1/0072

摘要： Disclosed is a method for validating a data packet by a network processor supporting a first-network protocol and a second network protocol and utilizing shared hardware. The network processor receives a data packet; identifies a network packet protocol for the data packet; and processes the data packet according to the network packet protocol comprising: updating a first register with a first partial packet length specific to the first network protocol; updating a second register with a second partial packet length specific to the second network protocol; and updating a third register with a first checksum computed from fields independent of the network protocol. The method produces a second checksum utilizing a function that combines values from the first register, the second register, and the third register. The method validates the data packet by comparing the data packet checksum to the second checksum.

摘要翻译： 公开了一种通过支持第一网络协议和第二网络协议的网络处理器来验证数据分组并利用共享硬件的方法。 网络处理器接收数据包; 识别数据包的网络包协议; 并根据网络分组协议对数据分组进行处理，包括：以第一网络协议特有的第一部分分组长度更新第一寄存器; 用第二网络协议特有的第二部分分组长度更新第二寄存器; 以及用独立于网络协议的字段计算的具有第一校验和的更新第三寄存器。 该方法利用组合来自第一寄存器，第二寄存器和第三寄存器的值的函数产生第二校验和。 该方法通过将数据包校验和与第二校验和进行比较来验证数据包。

公开(公告)号：US08675660B2

公开(公告)日：2014-03-18

申请号：US13466914

申请日：2012-05-08

申请人： Francois Abel ,  Claude Basso ,  Jean L. Calvignac ,  Natarajan Vaidhyanathan ,  Fabrice Jean Verplanken ,  Colin B. Verrilli

发明人： Francois Abel ,  Claude Basso ,  Jean L. Calvignac ,  Natarajan Vaidhyanathan ,  Fabrice Jean Verplanken ,  Colin B. Verrilli

IPC分类号： H04L12/28 ,  H04L12/54 ,  G06F15/173

CPC分类号： H04L47/6215

摘要： According to embodiments of the invention, there is provided a method for operating a network processor. The network processor receiving a first data packet in a stream of data packets and a set of receive-queues adapted to store receive data packets. The network processor processing the first data packet by reading a flow identification in the first data packet; determining a quality of service for the first data packet; mapping the flow identification and the quality of service into an index for selecting a first receive-queue for routing the first data packet; and utilizing the index to route the first data packet to the first receive-queue.

摘要翻译： 根据本发明的实施例，提供了一种用于操作网络处理器的方法。 网络处理器接收数据包流中的第一数据包和适于存储接收数据包的一组接收队列。 网络处理器通过读取第一数据分组中的流标识来处理第一数据分组; 确定第一数据分组的服务质量; 将流标识和服务质量映射到用于选择用于路由第一数据分组的第一接收队列的索引; 以及利用所述索引将所述第一数据分组路由到所述第一接收队列。

公开(公告)号：US20130266021A1

公开(公告)日：2013-10-10

申请号：US13990587

申请日：2011-12-19

申请人： Claude Basso ,  Jean L. Calvignac ,  Chih-jen Chang ,  Damon Philippe ,  Michel L. Poret ,  Natarajan Vaidhyanathan ,  Fabrice J. Verplanken ,  Colin B. Verrilli

发明人： Claude Basso ,  Jean L. Calvignac ,  Chih-jen Chang ,  Damon Philippe ,  Michel L. Poret ,  Natarajan Vaidhyanathan ,  Fabrice J. Verplanken ,  Colin B. Verrilli

IPC分类号： H04L12/70

CPC分类号： H04L49/90 ,  G06F5/10 ,  G06F13/128

摘要： The invention provides a method for adding specific hardware on both receive and transmit sides that will hide to the software most of the effort related to buffer and pointers management. At initialization, a set of pointers and buffers is provided by software, in quantity large enough to support expected traffic. A Send Queue Replenisher (SQR) and Receive Queue Replenisher (RQR) hide RQ and SQ management to software. RQR and SQR fully monitor pointers queues and perform recirculation of pointers from transmit side to receive side.

摘要翻译： 本发明提供了一种在接收端和发送端添加特定硬件的方法，其将隐藏与软件大部分与缓冲器和指针管理相关的功能的软件。 在初始化时，一组指针和缓冲区由软件提供，数量足够大以支持预期流量。 发送队列补货（SQR）和接收队列补货（RQR）将RQ和SQ管理隐藏到软件中。 RQR和SQR完全监视指针队列，并执行从发送端到接收端的指针的再循环。

公开(公告)号：US07529224B2

公开(公告)日：2009-05-05

申请号：US11108485

申请日：2005-04-18

申请人： Claude Basso ,  Jean Louis Calvignac ,  Chih-jen Chang ,  Natarajan Vaidhyanathan ,  Fabrice Jean Verplanken

发明人： Claude Basso ,  Jean Louis Calvignac ,  Chih-jen Chang ,  Natarajan Vaidhyanathan ,  Fabrice Jean Verplanken

IPC分类号： H04L12/28

CPC分类号： H04L47/568 ,  H04L45/00 ,  H04L45/60 ,  H04L47/50 ,  H04L47/527

摘要： Systems and methods for scheduling data packets in a network processor are disclosed. Embodiments provide a network processor that comprises a best-effort scheduler with a minimal calendar structure for addressing schedule control blocks. In one embodiment, a three-entry calendar structure provides for weighted best effort scheduling. Each of a plurality different flows has an associated schedule control block. Schedule control blocks are stored as linked lists in a last-in-first-out buffer. Each calendar entry is associated with a different linked list by storing in the calendar entry the address of the first-out schedule control block in the linked list. Each schedule control block has a counter and is assigned a weight according to the bandwidth priority of the flow to which the corresponding packet belongs. Each time a schedule control block is accessed from a last-in-first-out buffer storing the linked list, the scheduler generates a scheduling event and the counter of the schedule control block is incremented. When an incremented counter of a schedule control block equals its weight, the schedule control block is temporarily removed from further scheduling.

摘要翻译： 公开了一种用于在网络处理器中调度数据分组的系统和方法。 实施例提供了一种网络处理器，其包括具有用于寻址日程控制块的最小日历结构的尽力而为调度器。 在一个实施例中，三入口日历结构提供加权最佳努力调度。 多个不同的流中的每一个具有相关的进度控制块。 计划控制块作为链表存储在先进先出缓冲区中。 通过在日历条目中存储链表中的先出时间表控制块的地址来将每个日历条目与不同的链表相关联。 每个调度控制块具有计数器，并根据相应分组所属的流的带宽优先级分配权重。 每当从存储链表的最先进先出缓冲器访问调度控制块时，调度器生成调度事件，并且调度控制块的计数器递增。 当调度控制块的递增计数器等于其权重时，调度控制块暂时从进一步调度中移除。

公开(公告)号：US20080181245A1

公开(公告)日：2008-07-31

申请号：US11669419

申请日：2007-01-31

申请人： Claude Basso ,  Jean L. Calvignac ,  Chih-jen Chang ,  Philippe Damon ,  Herman D. Dierks ,  Christoph Raisch ,  Jan-Bernd Themann ,  Natarajan Vaidhyanathan ,  Fabrice J. Verplanken ,  Colin B. Verrilli

发明人： Claude Basso ,  Jean L. Calvignac ,  Chih-jen Chang ,  Philippe Damon ,  Herman D. Dierks ,  Christoph Raisch ,  Jan-Bernd Themann ,  Natarajan Vaidhyanathan ,  Fabrice J. Verplanken ,  Colin B. Verrilli

IPC分类号： H04L12/56

CPC分类号： H04L47/50

摘要： A system and method for multicore processing of communications between data processing devices are provided. With the mechanisms of the illustrative embodiments, a set of techniques that enables sustaining media speed by distributing transmit and receive-side processing over multiple processing cores is provided. In addition, these techniques also enable designing multi-threaded network interface controller (NIC) hardware that efficiently hides the latency of direct memory access (DMA) operations associated with data packet transfers over an input/output (I/O) bus. Multiple processing cores may operate concurrently using separate instances of a communication protocol stack and device drivers to process data packets for transmission with separate hardware implemented send queue managers in a network adapter processing these data packets for transmission. Multiple hardware receive packet processors in the network adapter may be used, along with a flow classification engine, to route received data packets to appropriate receive queues and processing cores for processing.

摘要翻译： 提供了一种用于数据处理设备之间的通信的多核处理的系统和方法。 利用说明性实施例的机制，提供了一组通过在多个处理核上分发发送和接收侧处理来维持媒体速度的技术。 此外，这些技术还可以设计出多线程网络接口控制器（NIC）硬件，可有效地隐藏通过输入/输出（I / O）总线传输数据分组的直接存储器访问（DMA）操作的延迟。 多个处理核心可以使用通信协议栈和设备驱动程序的单独实例同时运行，以处理用于传输的数据分组，其中单独的硬件实现了处理这些数据分组以进行传输的网络适配器中的发送队列管理器。 可以使用网络适配器中的多个硬件接收分组处理器以及流分类引擎将接收到的数据分组路由到适当的接收队列和处理核心进行处理。

公开(公告)号：US07283529B2

公开(公告)日：2007-10-16

申请号：US10383973

申请日：2003-03-07

申请人： Claude Basso ,  Brahmanand K. Gorti ,  Natarajan Vaidhyanathan ,  Colin B. Verrilli

发明人： Claude Basso ,  Brahmanand K. Gorti ,  Natarajan Vaidhyanathan ,  Colin B. Verrilli

IPC分类号： H04L12/28 ,  H04L12/56 ,  G06F15/173

CPC分类号： H04L45/54 ,  H04L12/4641 ,  H04L45/50

摘要： A system and method for transmitting data from a first site to a second site over a shared Multi-Protocol Label Switched (MPLS) network comprising a plurality of routers, including an ingress router in communication with the first site and an egress router in communication with the second site, includes configuring a plurality of label switching paths between the ingress router and the egress router over a plurality of label switching devices. The method further includes performing a first lookup on one of at least one virtual routing and forwarding (VRF) table stored in the ingress router, whereby the first lookup identifies one routing table from a plurality of routing tables stored in the ingress router, each routing table being associated with one of the plurality of label switched paths, and performing a second lookup on the one routing table, wherein the routing table defines the associated label switched path between the ingress router and the egress router for a virtual private network (VPN) between the first site and the second site.

摘要翻译： 一种用于通过共享的多协议标签交换（MPLS）网络从第一站点传送数据到第二站点的系统和方法，包括多个路由器，包括与第一站点通信的入口路由器和与第一站点通信的出口路由器 第二站点包括通过多个标签交换设备在入口路由器和出口路由器之间配置多个标签交换路径。 该方法还包括对存储在入口路由器中的至少一个虚拟路由和转发（VRF）表中的一个执行第一查找，由此第一查找从存储在入口路由器中的多个路由表中识别一个路由表，每个路由 表与多个标签交换路径中的一个相关联，并且在一个路由表上执行第二查找，其中该路由表定义入口路由器与用于虚拟专用网（VPN）的出口路由器之间的关联标签交换路径， 在第一个站点和第二个站点之间。

公开(公告)号：US20060245443A1

公开(公告)日：2006-11-02

申请号：US11119329

申请日：2005-04-29

申请人： Claude Basso ,  Jean Calvignac ,  Chih-jen Chang ,  Natarajan Vaidhyanathan ,  Fabrice Verplanken

发明人： Claude Basso ,  Jean Calvignac ,  Chih-jen Chang ,  Natarajan Vaidhyanathan ,  Fabrice Verplanken

IPC分类号： H04L12/28 ,  G01R31/08

CPC分类号： H04L47/623 ,  H04L47/50 ,  H04L47/568

摘要： Systems and methods for scheduling data packets in a network processor are disclosed. Embodiments provide a network processor that comprises a best-effort scheduler with a minimal calendar structure for addressing schedule control blocks. In one embodiment, a four-entry calendar structure provides for rate-limited weighted best effort scheduling. Each of a plurality of different flows has associated schedule control blocks. Schedule control blocks are stored as linked lists in a last-in-first-out buffer. Each calendar entry is associated with a different linked list by storing in the calendar entry the address of the first-out schedule control block in the linked list. Each schedule control block has a counter and is assigned a rate limit according to the bandwidth priority of the flow to which the corresponding packet belongs. Each time a schedule control block is accessed from a last-in-first-out buffer storing the linked list, the scheduler generates a scheduling event and the counter of the schedule control block is incremented. When an incremented counter of a schedule control block equals its rate limit, the schedule control block is temporarily removed from further scheduling until a time interval concludes.

公开(公告)号：US20060221966A1

公开(公告)日：2006-10-05

申请号：US11096362

申请日：2005-04-01

申请人： Claude Basso ,  Jean Calvignac ,  Chih-jen Chang ,  Philippe Damon ,  Ronald Fuhs ,  Natarajan Vaidhyanathan ,  Fabrice Verplanken ,  Colin Verrilli ,  Scott Willenborg

发明人： Claude Basso ,  Jean Calvignac ,  Chih-jen Chang ,  Philippe Damon ,  Ronald Fuhs ,  Natarajan Vaidhyanathan ,  Fabrice Verplanken ,  Colin Verrilli ,  Scott Willenborg

IPC分类号： H04L12/56 ,  H04L12/28

CPC分类号： H04L49/3009 ,  H04L45/742 ,  H04L49/25

摘要： A method and system for performing a lookup for a packet in a computer network are disclosed. The packet includes a header. The method and system include providing a parser, providing a lookup engine coupled with the parser, and providing a processor coupled with the lookup engine. The parser is for parsing the packet for the header prior to receipt of the packet being completed. The lookup engine performs a lookup for the header and returns a resultant. In one aspect, the lookup includes performing a local lookup of a cache that includes resultants of previous lookups. The processor processes the resultant.

摘要翻译： 公开了一种用于在计算机网络中执行查找分组的方法和系统。 分组包括报头。 该方法和系统包括提供解析器，提供与解析器耦合的查找引擎，以及提供与查找引擎耦合的处理器。 解析器用于在接收到完成的数据包之前解析报头的数据包。 查找引擎对标题执行查找并返回结果。 在一个方面，查找包括执行包括先前查找的结果的高速缓存的本地查找。 处理器处理结果。