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公开(公告)号：US11271965B2
公开(公告)日：2022-03-08
申请号：US16808254
申请日：2020-03-03
Applicant: Intel Corporation
Inventor： Kyong-Tak Cho , Li Zhao , Manoj R. Sastry
IPC: H04L29/06 , B60R16/023 , G01R19/04 , G01R19/165 , H04L5/00 , H04L12/40 , B60R25/20
Abstract: One embodiment provides an electronic control unit (ECU) for a vehicle. The ECU includes transceiver circuitry, voltage measurement circuitry and feature set circuitry. The transceiver circuitry is to at least one of send and/or receive a message. The voltage measurement circuitry is to determine at least one of a high bus line voltage (VCANH) value and/or a low bus line voltage (VCANL) value, for each zero bit of at least one zero bit of a received message. The received the message includes a plurality of bits. The feature set circuitry is to determine a value of at least one feature of a feature set based, at least in part, on at least one of a high acknowledge (ACK) threshold voltage (VthH) and/or a low ACK threshold voltage (VthL). The feature set includes at least one of an operating most frequently measured VCANH value (VfreqH2) of a number of VCANH values and/or an operating most frequently measured VCANL value (VfreqL2) of a number of VCANL values.
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公开(公告)号：US10581906B2
公开(公告)日：2020-03-03
申请号：US15450650
申请日：2017-03-06
Applicant: Intel Corporation
Inventor： Kyong-Tak Cho , Li Zhao , Manoj R. Sastry
IPC: H04L29/06 , B60R16/023 , G01R19/04 , G01R19/165 , H04L5/00 , H04L12/40 , B60R25/20
Abstract: One embodiment provides an electronic control unit (ECU) for a vehicle. The ECU includes transceiver circuitry, voltage measurement circuitry and feature set circuitry. The transceiver circuitry is to at least one of send and/or receive a message. The voltage measurement circuitry is to determine at least one of a high bus line voltage (VCANH) value and/or a low bus line voltage (VCANL) value, for each zero bit of at least one zero bit of a received message. The received the message includes a plurality of bits. The feature set circuitry is to determine a value of at least one feature of a feature set based, at least in part, on at least one of a high acknowledge (ACK) threshold voltage (VthH) and/or a low ACK threshold voltage (VthL). The feature set includes at least one of an operating most frequently measured VCANH value (VfreqH2) of a number of VCANH values and/or an operating most frequently measured VCANL value (VfreqL2) of a number of VCANL values.
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公开(公告)号：US10404459B2
公开(公告)日：2019-09-03
申请号：US15428773
申请日：2017-02-09
Applicant: Intel Corporation
Inventor： Santosh Ghosh , Manoj R. Sastry
Abstract: Technologies for elliptic curve cryptography (ECC) include a computing device having an ECC engine that reads a datapath selector signal that indicates a 256-bit data width or a 384-bit data width. The ECC engine reads one or more parameters having a data width indicated by the datapath selector signal from a data port. The ECC engine reads an opcode from an instruction port that identifies an ECC operation such as an elliptic curve operation or a prime field arithmetic operation. The ECC engine performs the operation with the data width identified by the datapath selector. The ECC engine writes results data having the data width identified by the datapath selector to one or more output ports. The ECC engine may perform the elliptic curve operation with a specified side-channel protection level. The computing device may include a cryptography driver to control the ECC engine. Other embodiments are described and claimed.
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公开(公告)号：US10313130B2
公开(公告)日：2019-06-04
申请号：US15277462
申请日：2016-09-27
Applicant: Intel Corporation
Inventor： Rafael Misoczki , Steffen Schulz , Manoj R. Sastry , Santosh Ghosh , Li Zhao
Abstract: One embodiment provides a signer device. The signer device includes hash signature control logic and signer signature logic. The hash signature control logic is to retrieve a first nonce, to concatenate the first nonce and a message to be transmitted and to determine whether a first message representative satisfies a target threshold. The signer signature logic is to generate a first transmitted signature based, at least in part, on the first message representative, if the first message representative satisfies the target threshold. The hash signature control logic is to retrieve a second nonce, concatenate the second nonce and the message to be transmitted and to determine whether a second message representative satisfies the target threshold, if the first message representative does not satisfy the target threshold.
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65.发明申请公开(公告)号：US20190108109A1
公开(公告)日：2019-04-11
申请号：US16199383
申请日：2018-11-26
Applicant: Intel Corporation
Inventor： Santosh Ghosh , Marcio Juliato , Manoj R. Sastry
Abstract: A data processing system includes technology for detecting and tolerating faults. The data processing system comprises an electronic control unit (ECU) with a processing core and a fault-tolerant elliptic curve digital signature algorithm (ECDSA) engine. The fault-tolerant ECDSA engine comprises multiple verification state machines (VSMs). The data processing system also comprises nonvolatile storage in communication with the processing core and ECU software in the nonvolatile storage. The ECU software, when executed, enables the data processing system to operate as a node in a distributed data processing system, including receiving digitally signed messages from other nodes in the distributed data processing system. The ECU further comprises a known-answer built-in self-test unit (KA-BISTU). Also, the ECU software comprises fault-tolerant ECDSA engine (FTEE) management software which, when executed by the processing core, utilizes the KA-BISTU to periodically test the fault-tolerant ECDSA engine for faults. Other embodiments are described and claimed.
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Patent Agency Ranking
公开(公告)号：US20190104001A1
公开(公告)日：2019-04-04
申请号：US15720389
申请日：2017-09-29
Applicant: Intel Corporation
Inventor： Marcio Juliato , Li Zhao , Ahmed Shabbir , Manoj R. Sastry , Santosh Ghosh , Rafael Misoczki
IPC: H04L25/49
CPC classification number: H04L25/4917 , H04L12/40 , H04L2012/40215
Abstract: Embodiments may include systems and methods for authenticating a message between a transmitter and a receiver. An apparatus for communication may include a transmitter to transmit a message to a receiver via a physical channel coupling the transmitter and the receiver. The message may be transmitted via a plurality of transmission voltage levels varied from a plurality of nominal voltage levels on the physical channel. The transmitter may include a voltage generator to generate the plurality of transmission voltage levels varied in accordance with a sequence of voltage variations from the plurality of nominal voltage levels for the message. The sequence of voltage variations may serve to authenticate the message between the transmitter and the receiver. Other embodiments may be described and/or claimed.
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公开(公告)号：US20190044738A1
公开(公告)日：2019-02-07
申请号：US15971314
申请日：2018-05-04
Applicant: Intel Corporation
Inventor： Xiruo Liu , Liuyang Yang , Manoj R. Sastry , Moreno Ambrosin
Abstract: Disclosed herein are mobile device distribution methods and apparatuses. In embodiments, a system for managing cryptographic exchanges between devices capable of operating in accord with the Wireless Access Vehicular Environment (WAVE) functionality may comprise a device operable in at least a first environment in which the device is configured to: receive a first message with an associated first certificate chain; and add a second certificate chain associated with the device to a second message. The device may further determine if the first certificate chain includes an unknown certificate, and if so, set a flag associated with the second message; as well as determine if all certificates in the first certificate chain are known, and if so, check if message has the set flag, and if the flag is set, then unset the flag; and send the second message. Other embodiments may be disclosed and claimed.
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公开(公告)号：US10124764B1
公开(公告)日：2018-11-13
申请号：US15720478
申请日：2017-09-29
Applicant: Intel Corporation
Inventor： Shabbir Ahmed , Marcio Rogerio Juliato , Li Zhao , Manoj R. Sastry
IPC: B60R25/10 , B60R16/023 , H04L29/06 , H04L12/40
Abstract: Various systems and methods for intrusion detection are described herein. An electronic device for intrusion detection includes memory circuitry to store a set of signature voltage ratios and a corresponding set of node identifiers, each node identifier corresponding to a unique signature voltage ratio; and security circuitry to: compare voltages received at a first and second measuring point on a bus, the voltages resulting from a message transmitted by a sending node on the bus, the first measuring point providing a first voltage and the second measuring point providing a second voltage; calculate a test voltage ratio from the first voltage and the second voltage; determine whether the test voltage ratio is in the set of signature voltage ratios; and initiate a security response based on whether the test voltage ratio is in the set of signature voltage ratios.
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公开(公告)号：US20180227115A1
公开(公告)日：2018-08-09
申请号：US15428773
申请日：2017-02-09
Applicant: Intel Corporation
Inventor： Santosh Ghosh , Manoj R. Sastry
CPC classification number: H04L9/3066 , H04L9/002 , H04L2209/12
Abstract: Technologies for elliptic curve cryptography (ECC) include a computing device having an ECC engine that reads a datapath selector signal that indicates a 256-bit data width or a 384-bit data width. The ECC engine reads one or more parameters having a data width indicated by the datapath selector signal from a data port. The ECC engine reads an opcode from an instruction port that identifies an ECC operation such as an elliptic curve operation or a prime field arithmetic operation. The ECC engine performs the operation with the data width identified by the datapath selector. The ECC engine writes results data having the data width identified by the datapath selector to one or more output ports. The ECC engine may perform the elliptic curve operation with a specified side-channel protection level. The computing device may include a cryptography driver to control the ECC engine. Other embodiments are described and claimed.
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公开(公告)号：US10033534B2
公开(公告)日：2018-07-24
申请号：US14955255
申请日：2015-12-01
Applicant: INTEL CORPORATION
Inventor： Steffen Schulz , Rafael Misoczki , Manoj R. Sastry , Jesse Walker
Abstract: In a method for validating software updates, a data processing system contains a current version of a software component. The data processing system saves at least first and second current advance keys (AKs). After saving the current AKs, the data processing system receives an update package for a new version of the software component. The data processing system extracts a digital signature and two or more new AKs from the update package. The data processing system uses at least one current AK to determine whether the digital signature is valid. In response to a determination that the digital signature is valid, the data processing system uses a software image from the update package to update the software component, and the data processing system saves the new AKs, for subsequent utilization as the current AKs. Other embodiments are described and claimed.
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