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公开(公告)号：US12088263B2
公开(公告)日：2024-09-10
申请号：US17412823
申请日：2021-08-26
Applicant: Qorvo US, Inc.
Inventor： Nadim Khlat , Michael R. Kay
CPC classification number: H03F3/245 , H03F1/0222 , H03F3/195 , H03F2200/102 , H03F2200/451
Abstract: An equalizer circuit and related power management circuit are provided. The power management circuit includes a voltage amplifier circuit configured to generate an envelope tracking (ET) voltage based on a differential target voltage and provide the ET voltage to a power amplifier circuit(s) via a signal path for amplifying a radio frequency signal(s). An equalizer circuit is provided in the power management circuit to equalize the differential target voltage prior to generating the ET voltage. Specifically, the equalizer circuit is configured to provide a transfer function including a second-order complex-zero term and a real-zero term for offsetting a transfer function of an inherent trace inductance of the signal path and an inherent impedance of the voltage amplifier circuit. By employing the second-order transfer function with the real-zero term, it is possible to reduce distortion in the ET voltage, especially when the RF signal(s) is modulated in a wide modulation bandwidth.
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公开(公告)号：US11233481B2
公开(公告)日：2022-01-25
申请号：US16775554
申请日：2020-01-29
Applicant: Qorvo US, Inc.
Inventor： Nadim Khlat , Michael R. Kay
Abstract: An apparatus that includes a tracking amplifier having an amplifier output terminal coupled to an output voltage node and an envelope input terminal configured to receive an envelope signal of a radio frequency signal is disclosed. A multi-level voltage converter has a switched voltage terminal coupled to the output voltage node and a converter control input terminal configured to receive a converter control signal. A control signal multiplexer has a converter control output terminal coupled to the converter control input terminal, a first converter signal input terminal configured to receive a first converter control signal corresponding to a lower envelope modulation bandwidth, a second converter signal input terminal configured to receive a second converter control signal corresponding to a higher envelope modulation bandwidth, and a converter control signal selector terminal configured to receive a control selector signal for selecting between the first and second converter control signals.
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公开(公告)号：US20210391833A1
公开(公告)日：2021-12-16
申请号：US17217594
申请日：2021-03-30
Applicant: Qorvo US, Inc.
Inventor： Nadim Khlat , Michael R. Kay
Abstract: An average power tracking (APT) power management circuit is provided. The APT power management circuit is configured to generate a first APT voltage(s) for a first power amplifier(s) and a second APT voltage(s) for a second power amplifier(s). The APT power management circuit further includes a pair of switcher circuits that can generate a pair of reference voltages. Depending on various operating scenarios of the APT power management circuit, it is possible to selectively output any of the reference voltages as any one or more of the first APT voltage(s) and the second APT voltage(s). As such, it is possible to flexibly configure the APT power management circuit to support the various operating scenarios based on a minimum possible number of the switcher circuits, thus helping to reduce footprint and cost of the APT power management circuit.
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公开(公告)号：US20210036604A1
公开(公告)日：2021-02-04
申请号：US16807575
申请日：2020-03-03
Applicant: Qorvo US, Inc.
Inventor： Nadim Khlat , Jeffrey D. Potts , Michael R. Kay , Michael J. Murphy
Abstract: A multi-level charge pump (MCP) circuit is provided. The MCP circuit includes a multi-level voltage circuit configured to receive a supply voltage and generate a low-frequency voltage. The multi-level voltage circuit includes a first switch path, a second switch path, and a third switch path each having a respective on-resistance and coupled in parallel between an input node and an output node. In a non-limiting example, the multi-level voltage circuit is configured to activate the first switch path and at least one of the second switch path and the third switch path when the multi-level voltage circuit generates the low-frequency voltage that equals the supply voltage. By activating at least two of the three switch paths to generate the low-frequency voltage, it may be possible to reduce an equivalent resistance of the multi-level voltage circuit, thus helping to improve efficiency and reduce power loss of the MCP circuit.
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公开(公告)号：US10833637B2
公开(公告)日：2020-11-10
申请号：US16237141
申请日：2018-12-31
Applicant: Qorvo US, Inc.
Inventor： Nadim Khlat , Michael R. Kay
Abstract: Charge-pump tracker circuitry is disclosed having a first switch network configured to couple a first capacitor between a voltage input terminal and a ground terminal during a first charging phase and couple the first capacitor between the voltage input terminal and a pump output terminal during a first discharging phase. A second switch network is configured to couple the second capacitor between the voltage input terminal and the ground terminal during a second charging phase and couple the second capacitor between the voltage input terminal and the pump output terminal during a second discharging phase. A switch controller is configured to control the first switch network and the second switch network so that the first discharging phase and the second discharging phase are in unison in a parallel mode and so that the first discharging phase and the second discharging phase alternate in an interleaved mode.
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Patent Agency Ranking
公开(公告)号：US20200212796A1
公开(公告)日：2020-07-02
申请号：US16703951
申请日：2019-12-05
Applicant: Qorvo US, Inc.
Inventor： Michael J. Murphy , Michael R. Kay
IPC: H02M3/07
Abstract: A switching regulator system having a switching regulator configured to generate regulated voltage pulses at a switching output in response to a setpoint of an output voltage at a setpoint input and feedback of the output voltage at a feedback input is disclosed. A power inductor is coupled between the switching output and a filtered output, and a filter capacitor is coupled between the filtered output and a fixed voltage node. A transistor having a control input is coupled between the filtered output and the fixed voltage node. A transition comparator has a first comparator input coupled to the setpoint input, a second comparator input coupled to the feedback input, and a comparator output coupled to the control input, wherein the transition comparator is configured to monitor for a setpoint voltage dropping below a feedback voltage and in response turn on the transistor to discharge the filter capacitor.
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公开(公告)号：US20200076297A1
公开(公告)日：2020-03-05
申请号：US16122611
申请日：2018-09-05
Applicant: Qorvo US, Inc.
Inventor： Manbir Singh Nag , Michael R. Kay
Abstract: A DC power supply, which includes a DC-DC converter and a linear voltage regulator, is disclosed. The DC-DC converter provides a DC power supply signal and a duty-cycle signal, which is based on a duty-cycle of the DC-DC converter. The DC-DC converter provides the DC power supply signal via a power supply output using a setpoint of the DC power supply. The linear voltage regulator provides a DC assist signal to assist the DC-DC converter when an adjusted setpoint of the DC power supply is greater than a voltage of the DC power supply signal. The linear voltage regulator provides the adjusted setpoint using the setpoint and the duty-cycle signal, such that the adjusted setpoint is directly related to the setpoint and to the duty-cycle.
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公开(公告)号：US20190356285A1
公开(公告)日：2019-11-21
申请号：US16237141
申请日：2018-12-31
Applicant: Qorvo US, Inc.
Inventor： Nadim Khlat , Michael R. Kay
Abstract: Charge-pump tracker circuitry is disclosed having a first switch network configured to couple a first capacitor between a voltage input terminal and a ground terminal during a first charging phase and couple the first capacitor between the voltage input terminal and a pump output terminal during a first discharging phase. A second switch network is configured to couple the second capacitor between the voltage input terminal and the ground terminal during a second charging phase and couple the second capacitor between the voltage input terminal and the pump output terminal during a second discharging phase. A switch controller is configured to control the first switch network and the second switch network so that the first discharging phase and the second discharging phase are in unison in a parallel mode and so that the first discharging phase and the second discharging phase alternate in an interleaved mode.
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公开(公告)号：US10476437B2
公开(公告)日：2019-11-12
申请号：US16045946
申请日：2018-07-26
Applicant: Qorvo US, Inc.
Inventor： Manbir Singh Nag , Michael R. Kay , Nadim Khlat
Abstract: A multimode voltage tracker circuit is provided. The multimode voltage tracker circuit is configured to generate a modulated voltage for amplifying a radio frequency (RF) signal(s), which may be modulated in a wide range of modulation bandwidth. In one non-limiting example, the multimode voltage tracker circuit can be configured to operate in a low modulation bandwidth (LMB) mode to generate an average power tracking (APT) modulated voltage for amplifying the RF signal(s) when the RF signal(s) is modulated in a lower modulation bandwidth (e.g.,
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公开(公告)号：US20190089310A1
公开(公告)日：2019-03-21
申请号：US15939406
申请日：2018-03-29
Applicant: Qorvo US, Inc.
Inventor： Nadim Khlat , Michael R. Kay
Abstract: An envelope tracking (ET) power management circuit is provided. The ET power management circuit includes an amplifier circuit(s) configured to output a radio frequency (RF) signal at a defined power level corresponding to a direct current, an alternating current, and an ET modulated voltage received by the amplifier circuit(s). The ET power management circuit can operate in a high-power ET mode when the defined power level exceeds a defined power level threshold and the RF signal is modulated to include no more than a defined number of resource blocks. The ET power management includes two ET tracker circuitries each generating a respective ET modulated voltage and two charge pump circuitries each generating a respective current. In the high-power ET mode, both charge pump circuitries are activated to each provide a reduced current to the amplifier circuit, thus helping to reduce a footprint and cost of the ET power management circuit.
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