利索-全球专利检索

  1. 登录
  2. 注册

搜索结果

116 条记录 (耗时 0.04 秒)

    Dual trench isolation for CMOS with hybrid orientations
    62.
    发明申请
    Dual trench isolation for CMOS with hybrid orientations 审中-公开
    具有混合取向的CMOS的双沟槽隔离

    公开(公告)号：US20070040235A1

    公开(公告)日：2007-02-22

    申请号：US11207216

    申请日：2005-08-19

    申请人： Victor Chan ,  Meikei Ieong ,  Rajesh Rengarajan ,  Alexander Reznicek ,  Chun-yung Sung ,  Min Yang

    发明人： Victor Chan ,  Meikei Ieong ,  Rajesh Rengarajan ,  Alexander Reznicek ,  Chun-yung Sung ,  Min Yang

    IPC分类号： H01L29/04 ,  H01L21/76

    CPC分类号： H01L21/76229

    摘要： The present invention provides a semiconductor structure in which different types of devices are located upon a specific crystal orientation of a hybrid substrate that enhances the performance of each type of device. In the semiconductor structure of the present invention, a dual trench isolation scheme is employed whereby a first trench isolation region of a first depth isolates devices of different polarity from each other, while second trench isolation regions of a second depth, which is shallower than the first depth, are used to isolate devices of the same polarity from each other. The present invention further provides a dual trench semiconductor structure in which pFETs are located on a (110) crystallographic plane, while nFETs are located on a (100) crystallographic plane. In accordance with the present invention, the devices of different polarity, i.e., nFETs and pFETs, are bulk-like devices.

    摘要翻译： 本发明提供了一种半导体结构，其中不同类型的器件位于混合衬底的特定晶体取向上，这增强了每种器件的性能。 在本发明的半导体结构中，采用双沟槽隔离方案，由此第一深度的第一沟槽隔离区将彼此不同极性的器件隔离，而第二深度的第二沟槽隔离区比第 第一深度用于隔离相同极性的设备。 本发明还提供一种双沟槽半导体结构，其中pFET位于（110）结晶平面上，而nFET位于（100）晶面上。 根据本发明，不同极性的器件，即nFET和pFETs是大块状器件。

    Material for contact etch layer to enhance device performance
    65.
    发明申请
    Material for contact etch layer to enhance device performance 审中-公开
    用于接触蚀刻层的材料以增强器件性能

    公开(公告)号：US20060040497A1

    公开(公告)日：2006-02-23

    申请号：US11253622

    申请日：2005-10-20

    申请人： Ashima Chakravarti ,  Shreesh Narasimha ,  Victor Chan ,  Judson Holt ,  Satya Chakravarti

    发明人： Ashima Chakravarti ,  Shreesh Narasimha ,  Victor Chan ,  Judson Holt ,  Satya Chakravarti

    IPC分类号： H01L21/44

    CPC分类号： H01L21/0217 ,  C23C16/345 ,  H01L21/02271 ,  H01L21/02274 ,  H01L21/3185 ,  H01L29/7843

    摘要： Stress level of a nitride film is adjusted as a function of two or more of the following: identity of a starting material precursor used to make the nitride film; identity of a nitrogen-containing precursor with which is treated the starting material precursor; ratio of the starting material precursor to the nitrogen-containing precursor; a set of CVD conditions under which the film is grown; and/or a thickness to which the film is grown. A rapid thermal chemical vapor deposition (RTCVD) film produced by reacting a compound containing silicon, nitrogen and carbon (such as bis-tertiary butyl amino silane (BTBAS)) with NH3 can provide advantageous properties, such as high stress and excellent performance in an etch-stop application. An ammonia-treated BTBAS film is particularly excellent in providing a high-stress property, and further having maintainability of that high-stress property over repeated annealing.

    摘要翻译： 氮化膜的应力水平作为以下两个或更多个的函数来调节：用于制造氮化物膜的原料前体的同一性; 同时处理起始原料前体的含氮前体; 原料前体与含氮前体的比例; 电影种植的一系列CVD条件; 和/或薄膜生长的厚度。 通过使含有硅，氮和碳（例如双叔丁基氨基硅烷（BTBAS））的化合物与NH 3 N 3反应制备的快速热化学气相沉积（RTCVD）膜可以提供有利的性质，例如 在蚀刻停止应用中作为高应力和优异的性能。 氨处理的BTBAS膜在提供高应力性能方面特别优异，并且在反复退火时还具有高应力性能的可维护性。

    Material for contact etch layer to enhance device performance
    67.
    发明申请
    Material for contact etch layer to enhance device performance 失效
    用于接触蚀刻层的材料以增强器件性能

    公开(公告)号：US20050245081A1

    公开(公告)日：2005-11-03

    申请号：US10835949

    申请日：2004-04-30

    申请人： Ashima Chakravarti ,  Shreesh Narasimha ,  Victor Chan ,  Judson Holt ,  Satya Chakravarti

    发明人： Ashima Chakravarti ,  Shreesh Narasimha ,  Victor Chan ,  Judson Holt ,  Satya Chakravarti

    IPC分类号： H01L21/768 ,  C23C16/34 ,  H01L21/318 ,  H01L21/469 ,  H01L29/78

    CPC分类号： H01L21/0217 ,  C23C16/345 ,  H01L21/02271 ,  H01L21/02274 ,  H01L21/3185 ,  H01L29/7843

    摘要： Stress level of a nitride film is adjusted as a function of two or more of the following: identity of a starting material precursor used to make the nitride film; identity of a nitrogen-containing precursor with which is treated the starting material precursor; ratio of the starting material precursor to the nitrogen-containing precursor; a set of CVD conditions under which the film is grown; and/or a thickness to which the film is grown. A rapid thermal chemical vapor deposition (RTCVD) film produced by reacting a compound containing silicon, nitrogen and carbon (such as bis-tertiary butyl amino silane (BTBAS)) with NH3 can provide advantageous properties, such as high stress and excellent performance in an etch-stop application. An ammonia-treated BTBAS film is particularly excellent in providing a high-stress property, and further having maintainability of that high-stress property over repeated annealing.

    摘要翻译： 氮化膜的应力水平作为以下两个或更多个的函数来调节：用于制造氮化物膜的原料前体的同一性; 同时处理起始原料前体的含氮前体; 原料前体与含氮前体的比例; 电影种植的一系列CVD条件; 和/或薄膜生长的厚度。 通过使含有硅，氮和碳（例如双叔丁基氨基硅烷（BTBAS））的化合物与NH 3 N 3反应制备的快速热化学气相沉积（RTCVD）膜可以提供有利的性质，例如 在蚀刻停止应用中作为高应力和优异的性能。 氨处理的BTBAS膜在提供高应力性能方面特别优异，并且在反复退火时还具有高应力性能的可维护性。

    Dynamic cross fading method and apparatus
    68.
    发明申请
    Dynamic cross fading method and apparatus 失效
    动态交叉衰落方法和装置

    公开(公告)号：US20050219418A1

    公开(公告)日：2005-10-06

    申请号：US10818408

    申请日：2004-04-05

    申请人： Victor Chan ,  Raymond Chow

    发明人： Victor Chan ,  Raymond Chow

    IPC分类号： G06T3/00 ,  G09G5/00 ,  G09G5/36 ,  G09G5/39 ,  H04N5/262 ,  H04N5/265 ,  H04N9/74

    CPC分类号： H04N9/74 ,  H04N5/265

    摘要： Provided is a method and apparatus for dynamic cross fading. Specifically, an embedded system can display an image produced from a blend of other images. Initially, a first image and a second image are stored in a buffer in a display controller. Then, the display controller extracts pixels from corresponding locations in the first image and the second image. The pixels are combined with weights associated with each image to perform the cross fade calculation. Consequently, the result from the cross fade calculation is transmitted to a display unit connected to the display controller for viewing. The result can also be fetched during a refresh of a panel in the display unit. In either case, the result is transmitted to a display pipe during dynamic cross fading. Thus, any images stored in the buffer remain unchanged.

    摘要翻译： 提供了一种用于动态交叉衰落的方法和装置。 具体来说，嵌入式系统可以显示从其他图像的混合产生的图像。 最初，将第一图像和第二图像存储在显示控制器中的缓冲器中。 然后，显示控制器从第一图像和第二图像中的相应位置提取像素。 将像素与与每个图像相关联的权重组合以执行交叉淡入淡出计算。 因此，交叉淡入淡出计算的结果被发送到与显示控制器连接的显示单元进行观看。 结果还可以在刷新显示单元中的面板时获取。 在任一情况下，在动态交叉衰落期间将结果传输到显示管道。 因此，存储在缓冲器中的任何图像保持不变。

    Method and system for a computer system to support various communication devices
    69.
    发明授权
    Method and system for a computer system to support various communication devices 失效
    一种用于支持各种通信设备的计算机系统的方法和系统

    公开(公告)号：US06948002B2

    公开(公告)日：2005-09-20

    申请号：US10010887

    申请日：2001-12-07

    申请人： Victor Chan ,  Kit Yin Madelaine Fok ,  Mark W. Hubbard

    发明人： Victor Chan ,  Kit Yin Madelaine Fok ,  Mark W. Hubbard

    IPC分类号： G06F3/14 ,  G06Q30/00 ,  G06F15/16

    CPC分类号： H04L67/303 ,  G06Q30/06 ,  H04L29/06 ,  H04L67/02 ,  H04L69/329

    摘要： A system method of interfacing a computer system executing commercial transactions initiated from communication devices, each communication device having a display, with custom display parameters, is provided. For the system and method, at the computer system, for each device, a command is received and translated into a common format command. The common format command is executed and results therefrom are received. A database is accessed having elements identifying sets of display parameters, one set of the sets is for use with the custom display parameters. One set of display parameters is retrieved from the database.

    摘要翻译： 提供了一种系统方法，用于连接执行从通信设备发起的商业交易的计算机系统，具有显示器的每个通信设备具有自定义显示参数。 对于系统和方法，在计算机系统中，对于每个设备，接收命令并将其转换为通用格式命令。 执行通用格式命令，并接收其结果。 访问具有识别显示参数集的元素的数据库，一组集合用于定制显示参数。 从数据库中检索一组显示参数。

    SUBSTRATE ENGINEERING FOR OPTIMUM CMOS DEVICE PERFORMANCE
    70.
    发明申请
    SUBSTRATE ENGINEERING FOR OPTIMUM CMOS DEVICE PERFORMANCE 有权
    用于最佳CMOS器件性能的基板工程

    公开(公告)号：US20050001290A1

    公开(公告)日：2005-01-06

    申请号：US10604003

    申请日：2003-06-20

    申请人： Victor Chan ,  Meikei Leong ,  Min Yang

    发明人： Victor Chan ,  Meikei Leong ,  Min Yang

    IPC分类号： H01L21/8238 ,  H01L29/76

    CPC分类号： H01L21/823807

    摘要： An integrated semiconductor structure having different types of complementary metal oxide semiconductor devices (CMOS), i.e., PFETs and NFETs, located atop a semiconductor substrate, wherein each CMOS device is fabricated such that the current flow for each device is optimal is provided. Specifically, the structure includes a semiconductor substrate that has a (110) surface orientation and a notch pointing in a direction of current flow; and at least one PFET and at least one NFET located on the semiconductor substrate. The at least one PFET has a current flow in a direction and the at least one NFET has a current flow in a direction. The direction is perpendicular to the direction. A method of fabricating such as integrated semiconductor structure is also provided.

    摘要翻译： 提供了位于半导体衬底顶部的具有不同类型的互补金属氧化物半导体器件（CMOS）即PFET和NFET的集成半导体结构，其中每个CMOS器件被制造成使得每个器件的电流是最佳的。 具体地，该结构包括具有（110）表面取向的半导体衬底和指向电流<001>方向的凹口; 以及位于半导体衬底上的至少一个PFET和至少一个NFET。 所述至少一个PFET具有沿<110>方向的电流，并且所述至少一个NFET具有沿<100>方向的电流。 <110>方向垂直于<100>方向。 还提供了诸如集成半导体结构的制造方法。