Apparatus and method for precision trimming of integrated circuits using anti-fuse bond pads
    62.
    发明授权
    Apparatus and method for precision trimming of integrated circuits using anti-fuse bond pads 有权
    使用反熔丝接合焊盘精密修整集成电路的装置和方法

    公开(公告)号:US07301436B1

    公开(公告)日:2007-11-27

    申请号:US11274491

    申请日:2005-11-14

    IPC分类号: H01C13/00

    摘要: An apparatus and method for using anti-fuse bond pads used to provide trimmed resistor values to the input terminals of circuits on an integrated circuit die. The apparatus and method comprises fabricating on a semiconductor integrated circuit a resistive network. The resistive network includes a first terminal, a second terminal and a resistor coupled between the two terminals. An anti-fuse bond pad and a trimming resistor are coupled between the first terminal and the second terminal. The trimming resistor is configured to be electrically coupled between the first terminal and the second terminal when a ball bond is formed on the anti-fuse bond pad. In various embodiments, a plurality of the anti-fuse bond pads and trimming resistors may be coupled between the two terminals. By selectively forming ball bonds on the plurality of anti-fuse bond pads, the resistance of the network can be selectively trimmed as needed.

    摘要翻译: 一种用于使用反熔丝接合焊盘的装置和方法,用于向集成电路管芯上的电路的输入端提供修整的电阻值。 该装置和方法包括在半导体集成电路上制造电阻网络。 电阻网络包括耦合在两个端子之间的第一端子,第二端子和电阻器。 反熔丝接合焊盘和微调电阻耦合在第一端子和第二端子之间。 当在反熔丝接合焊盘上形成球焊时,微调电阻被配置为电耦合在第一端子和第二端子之间。 在各种实施例中,多个反熔丝接合焊盘和微调电阻器可以耦合在两个端子之间。 通过在多个反熔丝接合焊盘上选择性地形成球键,可以根据需要选择性地修整网络的电阻。

    Imager with improved sensitivity
    64.
    发明授权
    Imager with improved sensitivity 失效
    成像仪灵敏度提高

    公开(公告)号:US06958194B1

    公开(公告)日:2005-10-25

    申请号:US10689779

    申请日:2003-10-21

    IPC分类号: B32B9/00 H01L27/146 H01L31/00

    摘要: An imaging cell reduces recombination losses and increases sensitivity by forming a low resistance lateral path with a silicon germanium layer of a conductivity type that is sandwiched between silicon layers of the same conductivity type. The silicon germanium layer also provides a quantum well from which photo-generated electrons find it difficult to escape, thereby providing a barrier that reduces cross-talk.

    摘要翻译: 成像单元通过用夹在相同导电类型的硅层之间的导电类型的硅锗层形成低电阻横向路径来降低复合损耗并增加灵敏度。 硅锗层还提供了一个量子阱,光电子发现它难以逃逸,从而提供了减少串扰的屏障。

    Fabrication of semiconductor structure having N-channel channel-junction field-effect transistor
    65.
    发明授权
    Fabrication of semiconductor structure having N-channel channel-junction field-effect transistor 有权
    具有N沟道沟道结场效应晶体管的半导体结构的制造

    公开(公告)号:US07595243B1

    公开(公告)日:2009-09-29

    申请号:US11495225

    申请日:2006-07-28

    IPC分类号: H01L21/8236

    摘要: A semiconductor technology combines a normally off n-channel channel-junction insulated-gate field-effect transistor (“IGFET”) (104) and an n-channel surface-channel IGFET (100 or 160) to reduce low-frequency 1/f noise. The channel-junction IGFET is normally fabricated to be of materially greater gate dielectric thickness than the surface-channel IGFET so as to operate across a greater voltage range than the surface-channel IGFET. A p-channel surface-channel IGFET (102 or 162), which is typically fabricated to be of approximately the same gate-dielectric thickness as the n-channel surface-channel IGFET, is preferably combined with the two n-channel IGFETs to produce a complementary-IGFET structure. A further p-channel IGFET (106, 180, 184, or 192), which is typically fabricated to be of approximately the same gate dielectric thickness as the n-channel channel-junction IGFET, is also preferably included. The further p-channel IGFET can be a surface-channel or channel-junction device.

    摘要翻译: 半导体技术结合了正常n沟道沟道结绝缘栅场效应晶体管(“IGFET”)(104)和n沟道表面沟道IGFET(100或160),以降低低频1 / f 噪声。 沟道结IGFET通常被制造为具有比表面沟道IGFET大得多的栅介质厚度,以便在比表面沟道IGFET更大的电压范围内工作。 典型地制造为与n沟道表面沟道IGFET大致相同的栅介质厚度的p沟道表面沟道IGFET(102或162)优选地与两个n沟道IGFET组合以产生 互补IGFET结构。 还优选包括通常被制造为具有与n沟道沟道结IGFET大致相同的栅介质厚度的另外的p沟道IGFET(106,180,184或192)。 另外的p沟道IGFET可以是表面沟道或沟道结器件。

    Apparatus for high sensitivity, low lag, high voltage swing in a pixel cell with an electronic shutter
    66.
    发明授权
    Apparatus for high sensitivity, low lag, high voltage swing in a pixel cell with an electronic shutter 有权
    用于具有电子快门的像素单元中的高灵敏度,低滞后,高电压摆幅的装置

    公开(公告)号:US06720592B1

    公开(公告)日:2004-04-13

    申请号:US09895803

    申请日:2001-06-29

    IPC分类号: H01L27148

    CPC分类号: H01L27/14601

    摘要: The present invention is directed to a photogate based pixel cell with an electronic shutter and which provides relatively low lag and high sensitivity for sensing infrared light reflected from objects. Additionally, this invention eliminates the need for a transfer gate in the pixel cell. In one embodiment, the reset and shutter transistors are implemented with PMOS transistors so that the pixel cell can have an increased dynamic range and a relatively high voltage swing. In another embodiment, the actual size of each pixel cell can be further reduced when the reset gate and the electronic shutter are implemented with NMOS transistors. Also, when a P− well is not disposed beneath the photogate, the ability of the pixel cell to sense infrared light is improved. Correlated double sampling can be used to improve the accuracy of the signal read out from the pixel cell.

    摘要翻译: 本发明涉及一种具有电子快门的基于光栅的像素单元,其提供用于感测从物体反射的红外光的相对较低的滞后和高灵敏度。 另外,本发明消除了对像素单元中的传输门的需要。 在一个实施例中,复位和快门晶体管由PMOS晶体管实现,使得像素单元可以具有增加的动态范围和相对高的电压摆幅。 在另一个实施例中,当复位门和电子快门用NMOS晶体管实现时,可以进一步减小每个像素单元的实际尺寸。 此外,当P-阱不设置在光栅下方时,像素单元感测红外光的能力得到改善。 可以使用相关的双重采样来提高从像素单元读出的信号的精度。

    Vertical photodetector with improved photocarrier separation and low capacitance
    67.
    发明授权
    Vertical photodetector with improved photocarrier separation and low capacitance 有权
    具有改进的光载流子分离和低电容的垂直光电探测器

    公开(公告)号:US06534759B1

    公开(公告)日:2003-03-18

    申请号:US09950121

    申请日:2001-09-10

    IPC分类号: H01L3100

    摘要: A vertical photodetector for detecting different wavelengths of light. The structure provides doped regions, which are separated by barrier regions. The doped regions detect photons corresponding to different wavelengths of light. Specifically, by detecting the amount of electrical charge collected by diodes positioned in the different doped regions, different wavelengths of light can be detected. The barrier regions inhibit the flow of electrical charges from one doped region into another doped region. The area of the doped regions can be increased, without increasing the capacitance of the diodes which are used to detect the electrical charges generated by light incident of the vertical photodetector.

    摘要翻译: 用于检测不同波长的光的垂直光电探测器。 该结构提供掺杂区域,其被屏障区域分隔开。 掺杂区域检测对应于不同波长的光的光子。 具体地,通过检测位于不同掺杂区域中的二极管收集的电荷量,可以检测不同波长的光。 阻挡区域阻止电荷从一个掺杂区域流入另一个掺杂区域。 可以增加掺杂区域的面积,而不增加用于检测由垂直光电检测器入射的光产生的电荷的二极管的电容。

    Configuration and fabrication of semiconductor structure having n-channel channel-junction field-effect transistor
    68.
    发明授权
    Configuration and fabrication of semiconductor structure having n-channel channel-junction field-effect transistor 有权
    具有n沟道沟道结场效应晶体管的半导体结构

    公开(公告)号:US07176530B1

    公开(公告)日:2007-02-13

    申请号:US10803203

    申请日:2004-03-17

    IPC分类号: H01L29/76

    摘要: A semiconductor technology combines a normally off n-channel channel-junction insulated-gate field-effect transistor (“IGFET”) (104) and an n-channel surface-channel IGFET (100 or 160) to reduce low-frequency 1/f noise. The channel-junction IGFET is normally of materially greater gate dielectric thickness than the surface-channel IGFET so as to operate across a greater voltage range than the surface-channel IGFET. Alternatively or additionally, the channel-junction IGFET may conduct current through a field-induced surface channel. A p-channel surface-channel IGFET (102 or 162), which is typically of approximately the same gate-dielectric thickness as the n-channel surface-channel IGFET, is preferably combined with the two n-channel IGFETs to produce a complementary-IGFET structure. A further p-channel IGFET (106, 180, 184, or 192), which is typically of approximately the same gate dielectric thickness as the n-channel channel-junction IGFET, is also preferably included. The further p-channel IGFET can be a surface-channel or channel-junction device.

    摘要翻译: 半导体技术结合了正常n沟道沟道结绝缘栅场效应晶体管(“IGFET”)(104)和n沟道表面沟道IGFET(100或160),以降低低频1 / f 噪声。 沟道结IGFET通常具有比表面沟道IGFET大得多的栅介质厚度,以便在比表面沟道IGFET更大的电压范围内工作。 或者或另外,通道结IGFET可以传导电流通过场诱导的表面通道。 通常与n沟道表面沟道IGFET大致相同的栅介质厚度的p沟道表面沟道IGFET(102或162)优选与两个n沟道IGFET组合, IGFET结构。 还优选包括通常具有与n沟道沟道结IGFET大致相同的栅介质厚度的另外的p沟道IGFET(106,180,184或192)。 另外的p沟道IGFET可以是表面沟道或沟道结器件。