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182 条记录 (耗时 0.036 秒)

    On-chip power inductor
    3.
    发明授权
    On-chip power inductor 有权
    片上功率电感

    公开(公告)号：US07875955B1

    公开(公告)日：2011-01-25

    申请号：US11713921

    申请日：2007-03-05

    申请人： Peter J. Hopper ,  Peter Johnson ,  Kyuwoon Hwang ,  Philipp Lindorfer

    发明人： Peter J. Hopper ,  Peter Johnson ,  Kyuwoon Hwang ,  Philipp Lindorfer

    IPC分类号： H01L27/08

    CPC分类号： H01L23/5227 ,  H01F17/0006 ,  H01F17/02 ,  H01L2924/0002 ,  H01L2924/3011 ,  H01L2924/00

    摘要： An on-chip inductor structure for a DC-DC power regulator circuit merges the switching transistor metallization with the inductor. Thick top level conductor metal that is used to strap the transistor array and to lower its on-state resistance is also used to extend the power inductor into the transistor array. Thus, the structure includes three basic components: a power inductor that spirals around the transistor array, the transistor array itself, and the transistor array metallization that is used to form a distributed inductance situated over the transistor array.

    摘要翻译： 用于DC-DC功率调节器电路的片上电感器结构将开关晶体管金属化与电感器并入。 用于绑定晶体管阵列并降低其导通电阻的厚顶级导体金属也用于将功率电感器扩展到晶体管阵列中。 因此，该结构包括三个基本部件：围绕晶体管阵列螺旋的功率电感器，晶体管阵列本身以及用于形成位于晶体管阵列上方的分布式电感器的晶体管阵列金属化。

    Apparatus and method for precision trimming of integrated circuits using anti-fuse bond pads
    5.
    发明授权
    Apparatus and method for precision trimming of integrated circuits using anti-fuse bond pads 有权
    使用反熔丝接合焊盘精密修整集成电路的装置和方法

    公开(公告)号：US07301436B1

    公开(公告)日：2007-11-27

    申请号：US11274491

    申请日：2005-11-14

    申请人： Peter J. Hopper ,  Peter Johnson ,  Philipp Lindorfer

    发明人： Peter J. Hopper ,  Peter Johnson ,  Philipp Lindorfer

    IPC分类号： H01C13/00

    CPC分类号： H01L23/5228 ,  H01L24/02 ,  H01L27/0802 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/05042 ,  H01L2924/14 ,  H01L2924/19043

    摘要： An apparatus and method for using anti-fuse bond pads used to provide trimmed resistor values to the input terminals of circuits on an integrated circuit die. The apparatus and method comprises fabricating on a semiconductor integrated circuit a resistive network. The resistive network includes a first terminal, a second terminal and a resistor coupled between the two terminals. An anti-fuse bond pad and a trimming resistor are coupled between the first terminal and the second terminal. The trimming resistor is configured to be electrically coupled between the first terminal and the second terminal when a ball bond is formed on the anti-fuse bond pad. In various embodiments, a plurality of the anti-fuse bond pads and trimming resistors may be coupled between the two terminals. By selectively forming ball bonds on the plurality of anti-fuse bond pads, the resistance of the network can be selectively trimmed as needed.

    摘要翻译： 一种用于使用反熔丝接合焊盘的装置和方法，用于向集成电路管芯上的电路的输入端提供修整的电阻值。 该装置和方法包括在半导体集成电路上制造电阻网络。 电阻网络包括耦合在两个端子之间的第一端子，第二端子和电阻器。 反熔丝接合焊盘和微调电阻耦合在第一端子和第二端子之间。 当在反熔丝接合焊盘上形成球焊时，微调电阻被配置为电耦合在第一端子和第二端子之间。 在各种实施例中，多个反熔丝接合焊盘和微调电阻器可以耦合在两个端子之间。 通过在多个反熔丝接合焊盘上选择性地形成球键，可以根据需要选择性地修整网络的电阻。

    Method of switching a magnetic MEMS switch
    8.
    发明授权
    Method of switching a magnetic MEMS switch 有权
    切换磁性MEMS开关的方法

    公开(公告)号：US08098121B2

    公开(公告)日：2012-01-17

    申请号：US12852743

    申请日：2010-08-09

    申请人： Peter J Hopper ,  Trevor Niblock ,  Peter Johnson ,  Vladislav Vashchenko

    发明人： Peter J Hopper ,  Trevor Niblock ,  Peter Johnson ,  Vladislav Vashchenko

    IPC分类号： H01H51/22 ,  H01H51/34

    CPC分类号： H02M3/34

    摘要： A MEMS magnetic flux switch is fabricated as a ferromagnetic core. The core includes a center cantilever that is fabricated as a free beam that can oscillate at a resonant frequency that is determined by its mechanical and material properties. The center cantilever is moved by impulses applied by an associated motion oscillator, which can be magnetic or electric actuators.

    摘要翻译： MEMS磁通开关被制造为铁磁芯。 芯包括中心悬臂，其被制造为可以以其机械和材料性质确定的共振频率振荡的自由梁。 中心悬臂由相关运动振荡器施加的脉冲移动，运动振荡器可以是磁性或电动执行器。

    Apparatus and method for wafer level fabrication of high value inductors on semiconductor integrated circuits
    9.
    发明授权
    Apparatus and method for wafer level fabrication of high value inductors on semiconductor integrated circuits 有权
    用于在半导体集成电路上制造高价值电感器的晶片级的装置和方法

    公开(公告)号：US07897472B2

    公开(公告)日：2011-03-01

    申请号：US12624259

    申请日：2009-11-23

    申请人： Peter J. Hopper ,  Peter Johnson ,  Kyuwoon Hwang ,  Andrei Papou

    发明人： Peter J. Hopper ,  Peter Johnson ,  Kyuwoon Hwang ,  Andrei Papou

    IPC分类号： H01L21/20

    CPC分类号： H01L23/645 ,  H01L23/5227 ,  H01L28/10 ,  H01L2924/0002 ,  H01L2924/19015 ,  H01L2924/19104 ,  H01L2924/00

    摘要： Methods for forming multiple inductors on a semiconductor wafer are described. A plating layer and a photoresist layer are applied over a semiconductor wafer. Recess regions are etched in the photoresist layer using photolithographic techniques, which exposes portions of the underlying plating layer. Metal is electroplated into the recess regions in the photoresist layer to form multiple magnetic core inductor members. A dielectric insulating layer is applied over the magnetic core inductor members. Additional plating and photoresist layers are applied over the dielectric insulating layer. Recess regions are formed in the newly applied photoresist layer. Electroplating is used to form inductor windings in the recess regions. Optionally, a magnetic paste can be applied over the inductor coils.

    摘要翻译： 描述了在半导体晶片上形成多个电感器的方法。 将镀层和光致抗蚀剂层施加在半导体晶片上。 使用光刻技术在光致抗蚀剂层中蚀刻凹陷区域，其暴露下面的镀层的部分。 将金属电镀到光致抗蚀剂层的凹陷区域中以形成多个磁芯电感器构件。 介质绝缘层施加在磁芯电感器部件上。 在电介质绝缘层上施加附加的电镀和光致抗蚀剂层。 在新施加的光致抗蚀剂层中形成凹陷区域。 电镀用于在凹陷区域形成电感线圈。 可选地，可以在电感线圈上施加磁性糊。