公开(公告)号：US08318344B2

公开(公告)日：2012-11-27

申请号：US12820043

申请日：2010-06-21

申请人： Beom-Kwon Kim ,  Kyu-Nam Joo ,  Jae-Myung Kim ,  So-Ra Lee ,  Jong-Hee Lee ,  Young-Su Kim ,  Deok-Hyun Kim ,  Gu-Hyun Chung

发明人： Beom-Kwon Kim ,  Kyu-Nam Joo ,  Jae-Myung Kim ,  So-Ra Lee ,  Jong-Hee Lee ,  Young-Su Kim ,  Deok-Hyun Kim ,  Gu-Hyun Chung

IPC分类号： H01M2/16

CPC分类号： H01M10/0525 ,  H01M4/131 ,  H01M4/134 ,  H01M4/483 ,  H01M4/505 ,  H01M4/525 ,  H01M10/0587 ,  H01M2004/021 ,  H01M2004/027

摘要： A negative electrode for a lithium battery includes an active material layer and a current collector. The active material layer has a plurality of crystal grains and the plurality of crystal grains include a plurality of pores. A first pore of the plurality of pores has a first length and a second length, the first length being the maximum length orthogonal to the current collector and the second length being the maximum length orthogonal to the first length, and the first length is greater than the second length.

摘要翻译： 锂电池用负极包括活性物质层和集电体。 活性物质层具有多个晶粒，多个晶粒包括多个孔。 多个孔的第一孔具有第一长度和第二长度，第一长度是与集电体正交的最大长度，第二长度是与第一长度正交的最大长度，第一长度大于 第二个长度。

公开(公告)号：US07932540B2

公开(公告)日：2011-04-26

申请号：US11700946

申请日：2007-02-01

申请人： Yoon-Ha Jeong ,  Kang-Sung Lee ,  Young-Su Kim ,  Yun-Ki Hong ,  Sung-Woo Jung

发明人： Yoon-Ha Jeong ,  Kang-Sung Lee ,  Young-Su Kim ,  Yun-Ki Hong ,  Sung-Woo Jung

IPC分类号： H01L29/66

CPC分类号： H01L29/7787 ,  H01L29/42316 ,  H01L29/66462

摘要： A T-gate forming method for a high electron mobility transistor includes the steps of: coating a first, a second and a third resist, each having an electron beam sensitivity different from each other, on a semiconductor substrate; performing a first exposure process by using an electron beam on the semiconductor substrate and then selectively developing the third resist; defining a gate head area by selectively developing the second resist to have a developed width wider than that of the third resist; performing a second exposure process by using an electron beam on the semiconductor substrate and then selectively developing the first resist in a bent shape at a temperature lower than in the development of the second and the third steps; and depositing metallic materials on the resists and then removing them to form a T-gate.

摘要翻译： 一种用于高电子迁移率晶体管的T形栅形成方法包括以下步骤：在半导体衬底上涂覆各自具有彼此不同的电子束灵敏度的第一，第二和第三抗蚀剂; 通过在半导体衬底上使用电子束然后选择性地显影第三抗蚀剂来执行第一曝光处理; 通过选择性地显影所述第二抗蚀剂来限定栅极头区域，以具有比所述第三抗蚀剂宽的显影宽度; 通过在半导体衬底上使用电子束进行第二曝光处理，然后在低于第二和第三步骤的显影的温度下，以弯曲形状选择性地显影第一抗蚀剂; 并将金属材料沉积在抗蚀剂上，然后去除它们以形成T形栅极。

公开(公告)号：US20110074284A1

公开(公告)日：2011-03-31

申请号：US12711116

申请日：2010-02-23

申请人： Jong-Hee Lee ,  Kyu-Nam Joo ,  Jae-Myung Kim ,  Dong-Hyun Kang ,  Young-Su Kim

发明人： Jong-Hee Lee ,  Kyu-Nam Joo ,  Jae-Myung Kim ,  Dong-Hyun Kang ,  Young-Su Kim

IPC分类号： H01J17/49 ,  C09D1/00

CPC分类号： C03C17/3411 ,  C03C2217/475 ,  H01J11/10 ,  H01J11/40 ,  H01J2211/40

摘要： A composition for a protective layer of a plasma display panel includes a metal oxide powder containing a metal selected from Mg, Cu, Ca, Sr, Ba, Zn, Mn, Fe, Al, Ti, Zr, Sn, Ce and combinations thereof, a dispersing agent, and a solvent selected from nitrile compounds, tertiary alkyl acetates, alkylene glycol alkyl ethers, dichloromethane, tetrahydrofuran and combinations thereof. Also, a plasma display panel includes a protective layer formed of the composition for a protective layer, and a manufacturing method thereof.

摘要翻译： 用于等离子体显示面板的保护层的组合物包括含有选自Mg，Cu，Ca，Sr，Ba，Zn，Mn，Fe，Al，Ti，Zr，Sn，Ce及其组合的金属的金属氧化物粉末， 分散剂和选自腈化合物，叔烷基乙酸酯，亚烷基二醇烷基醚，二氯甲烷，四氢呋喃及其组合的溶剂。 此外，等离子体显示面板包括由保护层用组合物形成的保护层及其制造方法。

公开(公告)号：US20080309842A1

公开(公告)日：2008-12-18

申请号：US11987392

申请日：2007-11-29

申请人： Young-Su Kim

发明人： Young-Su Kim

IPC分类号： G02F1/1333 ,  H05K5/02

CPC分类号： G06F1/1698 ,  G02F1/133308 ,  G02F2001/133325 ,  G06F1/1616 ,  G06F1/1637

摘要： An electronic apparatus having a display device and method of manufacturing are disclosed, and particularly, an electronic apparatus of reduced size by having a front cover having a first cut-out portion; a rear cover having a second cut-out portion, wherein the front cover and the rear cover are joined together to house the flat display panel therebetween such that first and second cut-out portions are aligned to form a groove; and at least one antenna in the groove.

摘要翻译： 公开了一种具有显示装置和制造方法的电子设备，特别地，涉及具有第一切口部分的前盖的尺寸减小的电子设备; 具有第二切口部分的后盖，其中所述前盖和所述后盖接合在一起以将所述平面显示面板容纳在其间，使得第一和第二切口部分对准以形成凹槽; 以及槽中的至少一个天线。

公开(公告)号：US20080291336A1

公开(公告)日：2008-11-27

申请号：US12096641

申请日：2006-11-07

申请人： Ju-Yeun Kim ,  Young-Su Kim ,  Jae-Hwui Bae ,  Hyun Lee ,  Jong-Soo Lim ,  Soo-In Lee

发明人： Ju-Yeun Kim ,  Young-Su Kim ,  Jae-Hwui Bae ,  Hyun Lee ,  Jong-Soo Lim ,  Soo-In Lee

IPC分类号： H04B7/08

CPC分类号： H04B7/0814 ,  H04L25/03012 ,  H04L2025/03426 ,  H04L2025/03535

摘要： Provided are an apparatus and method for selecting an optimal signal using auxiliary equalization in a diversity receiver. The optimal signal selecting apparatus includes: a plurality of sync recovery units for extracting sync information from baseband signals, which are candidate signals, except a baseband signal selected as a current optimal signal a plurality of auxiliary equalizers for channel-equalizing the candidate signals based on the extracted sync information; a plurality of SNR measuring units for measuring signal-to-noise ratios (SNRs) of the candidate signals inputted to the auxiliary equalizers and the candidates signals equalized in the auxiliary equalizers; and an optimal signal selector for selecting an optimal candidate signal from the candidate signals by using the extracted sync information and the measured SNRs, and replacing the optimal signal with the optimal candidate signal when reception quality of the current optimal signal is poor.

摘要翻译： 提供了一种用于在分集接收机中使用辅助均衡来选择最佳信号的装置和方法。 最佳信号选择装置包括：多个同步恢复单元，用于从作为候选信号的基带信号中提取同步信息，除了选择为当前最优信号的基带信号，多个辅助均衡器，用于对候选信号进行信道均衡，基于 提取的同步信息; 多个SNR测量单元，用于测量输入到辅助均衡器的候选信号的信噪比（SNR）和在辅助均衡器中均衡的候选信号; 以及最优信号选择器，用于通过使用所提取的同步信息和测量的SNR从候选信号中选择最佳候选信号，并且当当前最佳信号的接收质量差时，用最佳候选信号替换最佳信号。

公开(公告)号：US20080203915A1

公开(公告)日：2008-08-28

申请号：US12017466

申请日：2008-01-22

申请人： Min-Suk Lee ,  Yury Matulevich ,  Suk-ki Kim ,  Jong-Seo Choi ,  Young-Su Kim ,  Hee-Young Chu ,  Deok-Hyun Kim ,  Soon-Sung Suh

发明人： Min-Suk Lee ,  Yury Matulevich ,  Suk-ki Kim ,  Jong-Seo Choi ,  Young-Su Kim ,  Hee-Young Chu ,  Deok-Hyun Kim ,  Soon-Sung Suh

IPC分类号： H01J17/49

CPC分类号： H01J9/02 ,  H01J11/12 ,  H01J11/40

摘要： A material for preparing a protective layer for a PDP, which reduces discharge delay time, improves temperature dependency, and has enhanced ion strength; a method of preparing the same; a protective layer formed of the material; and a PDP including the protective layer. More particularly, a material for a protective layer that includes monocrystalline magnesium oxide doped with a rare earth element at an amount of 2.0×10−5−1.0×10−2 parts by weight per 1 part by weight of magnesium oxide (MgO), a method of preparing the monocrystalline magnesium oxide by crystallizing it at about 2,800° C., a protective layer formed of the same, and PDP including the protective layer.

摘要翻译： 用于制备PDP保护层的材料，其减少放电延迟时间，提高温度依赖性，并且具有增强的离子强度; 其制备方法; 由该材料形成的保护层; 以及包含该保护层的PDP。 更具体地说，涉及一种用于保护层的材料，其包括掺杂稀土元素的单晶氧化镁，其量为每1重量份氧化镁（MgO）为2.0×10 -5 -1.0×10 -2重量份，氧化镁（MgO） 通过在约2800℃下使其结晶化制备单晶氧化镁，由其形成的保护层和包含保护层的PDP。

公开(公告)号：US20080108188A1

公开(公告)日：2008-05-08

申请号：US11700946

申请日：2007-02-01

申请人： Yoon-Ha Jeong ,  Kang-Sung Lee ,  Young-Su Kim ,  Yun-Ki Hong ,  Sung-Woo Jung

发明人： Yoon-Ha Jeong ,  Kang-Sung Lee ,  Young-Su Kim ,  Yun-Ki Hong ,  Sung-Woo Jung

IPC分类号： H01L21/338

CPC分类号： H01L29/7787 ,  H01L29/42316 ,  H01L29/66462

摘要： A T-gate forming method for a high electron mobility transistor includes the steps of: coating a first, a second and a third resist, each having an electron beam sensitivity different from each other, on a semiconductor substrate; performing a first exposure process by using an electron beam on the semiconductor substrate and then selectively developing the third resist; defining a gate head area by selectively developing the second resist to have a developed width wider than that of the third resist; performing a second exposure process by using an electron beam on the semiconductor substrate and then selectively developing the first resist in a bent shape at a temperature lower than in the development of the second and the third steps; and depositing metallic materials on the resists and then removing them to form a T-gate.

摘要翻译： 一种用于高电子迁移率晶体管的T形栅形成方法包括以下步骤：在半导体衬底上涂覆各自具有彼此不同的电子束灵敏度的第一，第二和第三抗蚀剂; 通过在半导体衬底上使用电子束然后选择性地显影第三抗蚀剂来执行第一曝光处理; 通过选择性地显影所述第二抗蚀剂来限定栅极头区域，以具有比所述第三抗蚀剂宽的显影宽度; 通过在半导体衬底上使用电子束进行第二曝光处理，然后在低于第二和第三步骤的显影的温度下，以弯曲形状选择性地显影第一抗蚀剂; 并将金属材料沉积在抗蚀剂上，然后去除它们以形成T形栅极。