公开(公告)号：US07750346B2

公开(公告)日：2010-07-06

申请号：US12339371

申请日：2008-12-19

Applicant: Yu-Cheng Chen

Inventor： Yu-Cheng Chen

IPC: H01L29/04 ,  H01L31/036 ,  H01L31/0376 ,  H01L31/20

CPC classification number: H01L27/124 ,  G02F1/136213 ,  G02F1/136227 ,  G02F2201/40

Abstract: A semiconductor structure and a method for manufacturing the same are provided. Compared to conventional structures of thin film transistors, the structure of the present invention uses a patterned first metal layer as a data line, and a patterned second metal layer as a gate line. In a thin film transistor, a gate is also located in the patterned first metal layer, and is electrically connected to the gate line located in the patterned second metal layer through a contact hole. A source and a drain of the thin film transistor are electrically connected to the data line through a contact hole. The structure of the present invention increases a storage capacitance and an aperture ratio.

Abstract translation: 提供半导体结构及其制造方法。 与传统的薄膜晶体管结构相比，本发明的结构使用图案化的第一金属层作为数据线，并且图案化的第二金属层用作栅极线。 在薄膜晶体管中，栅极也位于图案化的第一金属层中，并且通过接触孔电连接到位于图案化的第二金属层中的栅极线。 薄膜晶体管的源极和漏极通过接触孔电连接到数据线。 本发明的结构增加了存储电容和开口率。

公开(公告)号：US07649583B2

公开(公告)日：2010-01-19

申请号：US11958356

申请日：2007-12-17

Applicant: Yu-Cheng Chen ,  Ta-wei Chiu

Inventor： Yu-Cheng Chen ,  Ta-wei Chiu

IPC: G02F1/136 ,  G02F1/1343

CPC classification number: G02F1/136213 ,  H01L27/1255

Abstract: A method for fabricating a semiconductor structure with a multi-layer storage capacitor is provided. A substrate having an active element area and a storage capacitor area is provided. By sequentially fabricating a semiconductor layer, a first inter-layer dielectric (ILD) layer, a gate and a first electrode, a source and a drain in the semiconductor layer in the active element area, a second ILD layer, a patterned conductive layer served as a pixel electrode, a patterned third ILD layer, a plurality of contact windows in the first, second and third ILD layers for exposing the source, the drain, parts of the patterned conductive layer and the first electrode, a second electrode and a source/drain conductive line, the semiconductor structure with the multi-layer storage is obtained in consequence.

Abstract translation: 提供一种制造具有多层存储电容器的半导体结构的方法。 提供具有有源元件区域和存储电容器区域的基板。 通过在有源元件区域中的半导体层中依次制造半导体层，第一层间电介质（ILD）层，栅极和第一电极，源极和漏极，第二ILD层，图案化导电层 作为像素电极，图案化的第三ILD层，用于暴露源极，漏极，图案化导电层和第一电极的部分的第一，第二和第三ILD层中的多个接触窗口，第二电极和源极 /漏极导线，因此获得具有多层存储的半导体结构。

公开(公告)号：US07638371B2

公开(公告)日：2009-12-29

申请号：US11369624

申请日：2006-03-07

Applicant: Yu-Cheng Chen ,  Hung-Tse Chen

Inventor： Yu-Cheng Chen ,  Hung-Tse Chen

IPC: H01L21/00

CPC classification number: H01L21/76838 ,  H01L27/124

Abstract: A method for manufacturing a thin film transistor (“TFT”) array includes providing a substrate, a patterned first metal layer on the substrate including a plurality of first conductive lines and a plurality of second conductive lines disposed orthogonal to the first conductive lines, an insulating layer over the patterned first metal layer, a patterned silicon layer, a patterned passivation layer over the patterned silicon layer, and a patterned doped silicon layer and a patterned second metal layer over the patterned passivation layer, filling exposed portions of the patterned silicon layer and exposed portions of the first conductive lines and the second conductive lines, where the patterned second metal layer includes a plurality of third conductive lines and a plurality of fourth conductive lines, each of which corresponding respectively to one of the plurality of first conductive lines and the plurality of second conductive lines.

Abstract translation: 一种薄膜晶体管（“TFT”）阵列的制造方法，包括在基板上设置图案化的第一金属层，该基板包括多个第一导电线和与第一导线正交配置的多个第二导线， 图案化的第一金属层上的绝缘层，图案化硅层，图案化硅层上的图案化钝化层，以及图案化的掺杂硅层和图案化钝化层上的图案化的第二金属层，填充图案化硅层的暴露部分 以及所述第一导线和所述第二导线的暴露部分，其中所述图案化的第二金属层包括多个第三导线和多个第四导线，每个所述第四导线分别对应于所述多个第一导线中的一个， 多个第二导线。

公开(公告)号：US07579123B2

公开(公告)日：2009-08-25

申请号：US11557947

申请日：2006-11-08

Applicant: Fang-Tsun Chu ,  Yu-Cheng Chen

Inventor： Fang-Tsun Chu ,  Yu-Cheng Chen

IPC: G03F1/00

CPC classification number: C30B29/06 ,  B23K26/066 ,  C30B13/24 ,  C30B13/30 ,  H01L21/0242 ,  H01L21/02422 ,  H01L21/02532 ,  H01L21/0268 ,  H01L21/02691

Abstract: A mask for laser-crystallizing amorphous silicon into polysilicon is provided. The mask comprises a transparent substrate having a first block, a second block, and a third block with equal sizes. The second block is located between the first block and the third block. The first block includes a plurality of first transmission regions and a plurality of first opaque regions located between the first transmission regions. The second block includes a plurality of second transmission regions correspond to the first opaque regions and a plurality of second opaque regions located between the second transmission regions and corresponds to the first transmission regions. The third block includes a plurality of third transmission regions arranged corresponding to the centers of the first transmission regions and corresponding to centers of the second transmission regions and a plurality of third opaque regions located between the third transmission regions.

Abstract translation: 提供了一种用于将非晶硅激光结晶成多晶硅的掩模。 掩模包括具有第一块，第二块和具有相同尺寸的第三块的透明衬底。 第二块位于第一块和第三块之间。 第一块包括多个第一透射区域和位于第一透射区域之间的多个第一不透明区域。 第二块包括对应于第一不透明区域的多个第二透射区域和位于第二透射区域之间并对应于第一透射区域的多个第二不透明区域。 第三块包括对应于第一透射区域的中心并且对应于第二透射区域的中心布置的多个第三透射区域和位于第三透射区域之间的多个第三不透明区域。

公开(公告)号：US20080098354A1

公开(公告)日：2008-04-24

申请号：US11761449

申请日：2007-06-12

Applicant: Yu-Cheng Chen ,  Yen-Ping Tung

Inventor： Yu-Cheng Chen ,  Yen-Ping Tung

IPC: G06F9/44

CPC classification number: G06F8/65

Abstract: A modular management blade (MMB) system used to monitor the voltage, temperature and fan rotational speed in a blade server chassis is provided. The modular management blade system comprises a first modular management blade and a second modular management blade. The first modular management blade comprises a first memory unit used to store a first code. The second modular management blade is coupled to the first modular management blade through the first communication link. The second modular management blade comprises a communication link control unit and a second memory unit respectively used to receive an updating code package through the second communication link and store a second code. As the communication link control unit receives an updating code package, the first modular management blade and the second modular management blade respectively update the first code and the second code according to the updating code package.

Abstract translation: 提供了用于监视刀片服务器机箱中的电压，温度和风扇转速的模块化管理刀片（MMB）系统。 模块化管理刀片系统包括第一模块化管理刀片和第二模块化管理刀片。 第一模块化管理刀片包括用于存储第一代码的第一存储器单元。 第二模块化管理刀片通过第一通信链路耦合到第一模块化管理刀片。 第二模块化管理刀片包括分别用于通过第二通信链路接收更新代码包并存储第二代码的通信链路控制单元和第二存储器单元。 当通信链路控制单元接收到更新代码包时，第一模块化管理刀片和第二模块化管理刀片根据更新代码包分别更新第一代码和第二代码。

公开(公告)号：USD554588S1

公开(公告)日：2007-11-06

申请号：US29256483

申请日：2006-03-22

Applicant: Li-O Lee ,  Yu-Cheng Chen ,  Hua-Sheng Shih

Designer： Li-O Lee ,  Yu-Cheng Chen ,  Hua-Sheng Shih

公开(公告)号：US07285371B2

公开(公告)日：2007-10-23

申请号：US11002033

申请日：2004-11-30

Applicant: Kuo-Tung Huang ,  Shi-Deh Chao ,  I-Jein Cheng ,  Te-Yi Chang ,  Ming-Tzung Wu ,  Mon-Haw Chang ,  Yu-Cheng Chen

Inventor： Kuo-Tung Huang ,  Shi-Deh Chao ,  I-Jein Cheng ,  Te-Yi Chang ,  Ming-Tzung Wu ,  Mon-Haw Chang ,  Yu-Cheng Chen

IPC: G03F7/04

CPC classification number: G03F7/0007 ,  G03F7/027 ,  G03F7/031 ,  Y10S430/101

Abstract: A photosensitive composition and a color paste for making the photosensitive composition. The photosensitive resin composition comprises a photosensitive resin system; a pigment; a photo-reactive amphipathic molecule; and a solvent. The color paste for making the photosensitive composition comprises the pigment and the photo-reactive amphipathic molecule.

Abstract translation: 用于制备光敏组合物的光敏组合物和着色膏。 感光性树脂组合物含有感光性树脂体系， 颜料; 光反应性两亲分子; 和溶剂。 用于制备感光组合物的色浆包含颜料和光反应性两亲性分子。

公开(公告)号：US20070212824A1

公开(公告)日：2007-09-13

申请号：US11369624

申请日：2006-03-07

Applicant: Yu-Cheng Chen ,  Hung-Tse Chen

Inventor： Yu-Cheng Chen ,  Hung-Tse Chen

IPC: H01L21/3205 ,  H01L21/84

CPC classification number: H01L21/76838 ,  H01L27/124

Abstract: A method for manufacturing a thin film transistor (“TFT”) array includes providing a substrate, a patterned first metal layer on the substrate including a plurality of first conductive lines and a plurality of second conductive lines disposed orthogonal to the first conductive lines, an insulating layer over the patterned first metal layer, a patterned silicon layer, a patterned passivation layer over the patterned silicon layer, and a patterned doped silicon layer and a patterned second metal layer over the patterned passivation layer, filling exposed portions of the patterned silicon layer and exposed portions of the first conductive lines and the second conductive lines, where the patterned second metal layer includes a plurality of third conductive lines and a plurality of fourth conductive lines, each of which corresponding respectively to one of the plurality of first conductive lines and the plurality of second conductive lines.

Abstract translation: 一种薄膜晶体管（“TFT”）阵列的制造方法，包括在基板上设置图案化的第一金属层，该基板包括多个第一导电线和与第一导线正交配置的多个第二导线， 图案化的第一金属层上的绝缘层，图案化硅层，图案化硅层上的图案化钝化层，以及图案化的掺杂硅层和图案化钝化层上的图案化的第二金属层，填充图案化硅层的暴露部分 以及所述第一导线和所述第二导线的暴露部分，其中所述图案化的第二金属层包括多个第三导线和多个第四导线，每个所述第四导线分别对应于所述多个第一导线中的一个， 多个第二导线。

公开(公告)号：US20070196743A1

公开(公告)日：2007-08-23

申请号：US11557947

申请日：2006-11-08

Applicant: Fang-Tsun Chu ,  Yu-Cheng Chen

Inventor： Fang-Tsun Chu ,  Yu-Cheng Chen

IPC: C30B28/12 ,  C30B28/14 ,  C30B23/00 ,  G03F1/00 ,  C30B25/00

CPC classification number: C30B29/06 ,  B23K26/066 ,  C30B13/24 ,  C30B13/30 ,  H01L21/0242 ,  H01L21/02422 ,  H01L21/02532 ,  H01L21/0268 ,  H01L21/02691

Abstract: A mask for laser-crystallizing amorphous silicon into polysilicon is provided. The mask comprises a transparent substrate having a first block, a second block, and a third block with equal sizes. The second block is located between the first block and the third block. The first block includes a plurality of first transmission regions and a plurality of first opaque regions located between the first transmission regions. The second block includes a plurality of second transmission regions correspond to the first opaque regions and a plurality of second opaque regions located between the second transmission regions and corresponds to the first transmission regions. The third block includes a plurality of third transmission regions arranged corresponding to the centers of the first transmission regions and corresponding to centers of the second transmission regions and a plurality of third opaque regions located between the third transmission regions.

Abstract translation: 提供了一种用于将非晶硅激光结晶成多晶硅的掩模。 掩模包括具有第一块，第二块和具有相同尺寸的第三块的透明衬底。 第二块位于第一块和第三块之间。 第一块包括多个第一透射区域和位于第一透射区域之间的多个第一不透明区域。 第二块包括对应于第一不透明区域的多个第二透射区域和位于第二透射区域之间并对应于第一透射区域的多个第二不透明区域。 第三块包括对应于第一透射区域的中心并且对应于第二透射区域的中心布置的多个第三透射区域和位于第三透射区域之间的多个第三不透明区域。

公开(公告)号：US20070190705A1

公开(公告)日：2007-08-16

申请号：US11524440

申请日：2006-09-21

Applicant: Fang-Tsun Chu ,  Yu-Cheng Chen

Inventor： Fang-Tsun Chu ,  Yu-Cheng Chen

IPC: H01L21/84

CPC classification number: H01L29/04 ,  H01L27/1296 ,  H01L29/78696

Abstract: A method for forming a poly-silicon thin-film device, comprising steps of: providing a substrate; forming a poly-silicon film on the substrate, the poly-silicon film comprising a plurality of poly-silicon grains oriented in a grain growth direction; and forming a plurality of thin-film transistors, each of the thin-film transistors including a channel region formed from a portion of the poly-silicon film; wherein at least one channel region has an equivalent parallel channel region with a channel direction parallel to the grain growth direction and an equivalent perpendicular channel region with a channel direction perpendicular to the grain growth direction.

Abstract translation: 一种形成多晶硅薄膜器件的方法，包括以下步骤：提供衬底; 在所述基板上形成多晶硅膜，所述多晶硅膜包括沿晶粒生长方向取向的多个多晶硅晶粒; 以及形成多个薄膜晶体管，每个所述薄膜晶体管包括由所述多晶硅膜的一部分形成的沟道区; 其中至少一个沟道区具有平行于晶粒生长方向的沟道方向的等效平行沟道区和具有垂直于晶粒生长方向的沟道方向的等效垂直沟道区。