Abstract:
The disclosure describes a liquid crystal display panel including a plurality of sub-pixels, a plurality of thin film transistors, a plurality of data lines, and a plurality of gate lines. Each of the sub-pixels has first and second gray scale regions which are split up and down and have different areas, first and second gray scale regions of one sub-pixel having a staggered arrangement with respect to those of an adjacent sub-pixel. Thin film transistors are connected to first and second gray scale regions so that first gray scale regions are driven when one of gate lines is driven and the second gray scale regions are driven when another gate line is driven.
Abstract:
A liquid crystal display is provided, which includes: a substrate; a field-generating electrode formed on the substrate; and a slope member formed on the substrate and having an inclination angle smaller than about 45 degrees.
Abstract:
Disclosed is a liquid crystal display capable of high quality image and bright display. Gate signal lines are curved at near switching elements of the liquid crystal display. A pixel area is defined by the gate signal lines and their intersecting data signal lines. Pixel electrodes and common electrodes are disposed along a longitudinal direction of a pixel. A pixel signal and a common signal line is connected to the pixel electrode and the common electrode respectively. A storage capacitor may be formed in the middle of a longitudinal direction of the pixel, or where generally a texture may arise during display. One half of the pixel may be symmetrical with the other half with respect to the storage capacitor. A common signal line may be parallel with the data signal line and be disposed nearer to the data signal line than a pixel signal line. The pixel may be disposed symmetrically with respect to the data signal line therebetween. The pixel shape may also be repeated in the direction of the gate signal line.
Abstract:
A TFT array panel on which both pixel electrodes and common electrodes are formed and a color filter panel is disposed opposing the array panel, and liquid crystals are interposed therebetween. The liquid crystals are aligned parallel to the two panels and driven by parallel electric field formed between the pixel electrodes and reference electrodes. Polarization films are arranged outsides the two panels, and a quasi-A plate compensation film is arranged between the color filter panel and the polarization film. An LCD according to the present invention includes first and second panels, a common electrode formed within the first or the second panel, a pixel electrode formed within the same panel as the common electrode is formed, a liquid crystal layer interposed between the first and second panels, a lower polarization film arranged under the first panel in which the first polarization film is arranged between the first and the second supporting bodies, and an upper polarization film arranged over the second panel in which the second polarization film is arranged between the third and fourth supporting bodies. Yellow shift in black state is also reduced and contrast ratio of side view is improved by minimizing Rth in supporting films or by using TEG polarization film having small Rth.
Abstract:
The present invention is directed to an apparatus of driving a liquid crystal display device including a plurality of pixels. The driving apparatus includes a gray voltage generator for generating a plurality of gray voltages, an image signal driver for selecting gray voltages corresponding to color signals and applying the selected gray voltages as image signal voltages to the pixels, and a signal controller for controlling the image signal driver based on the color signals and input control signals for controlling the color signals. At least two successive first gray voltages among the plurality of gray voltages are variable and at least two successive second gray voltages among the plurality of gray voltages are fixed.
Abstract:
An apparatus for measuring response time of a display apparatus including a photographing part including a charge coupled device camera and a microscope, an image processing part receiving a picture taken from a photographing part and calculating the response time thereof, and a control part applying a predetermined image signal to the display apparatus and controlling the photographing part to take a picture change of the display apparatus at a predetermined time.
Abstract:
Disclosed is a liquid crystal display capable of high quality image and bright display. Gate signal lines are curved at near switching elements of the liquid crystal display. A pixel area is defined by the gate signal lines and their intersecting data signal lines. Pixel electrodes and common electrodes are disposed along a longitudinal direction of a pixel. A pixel signal and a common signal line is connected to the pixel electrode and the common electrode respectively. A storage capacitor may be formed in the middle of a longitudinal direction of the pixel, or where generally a texture may arise during display. One half of the pixel may be symmetrical with the other half with respect to the storage capacitor. A common signal line may be parallel with the data signal line and be disposed nearer to the data signal line than a pixel signal line. The pixel may be disposed symmetrically with respect to the data signal line therebetween. The pixel shape may also be repeated in the direction of the gate signal line.
Abstract:
In a method of fabricating a liquid crystal display, an insulating layer for storage capacitors is reduced in thickness to increase the storage capacity while maintaining the aperture ratio in a stable manner. A thin film transistor array panel for the liquid crystal display includes an insulating substrate, and a gate line assembly and a storage capacitor line assembly formed on the insulating substrate. The gate line assembly has gate lines and gate electrodes. A gate insulating layer covers the gate line assembly and the storage capacitor line assembly. A semiconductor pattern is formed on the gate insulating layer. A data line assembly and storage capacitor conductive patterns are formed on the gate insulating layer overlaid with the semiconductor pattern. The data line assembly has data lines, source electrodes and drain electrodes. The storage capacitor conductive patterns are partially overlapped with the storage capacitor line assembly to thereby form first storage capacitors. A passivation layer covers the data line assembly, the storage capacitor conductive patterns and the semiconductor pattern. First and second contact holes are formed at the passivation layer while exposing the drain electrodes and the storage capacitor conductive patterns. Pixel electrodes are formed on the passivation layer while being connected to the drain electrodes and the storage capacitor conductive patterns through the first and the second contact holes. The pixel electrodes form second storage capacitors in association with parts of the storage capacitor line assembly.
Abstract:
A thin film transistor array panel is provided, which includes: a plurality of gate lines formed on a substrate and including a plurality of oblique portions and a plurality of gate electrodes; a first insulating layer on the gate line; a semiconductor layer formed on the first insulating layer; a plurality of data lines formed at least on the semiconductor layer and intersecting the gate lines to defined trapezoidal pixel areas; a plurality of drain electrodes separated from the data lines; a second insulating layer formed at least on portions of the semiconductor layer that are not covered with the data lines and the drain electrodes; a plurality of pixel electrodes formed on the second insulating layer and connected to the drain electrodes, at least two of the pixel electrodes disposed in each pixel area; and a plurality of common electrodes formed on the second insulating layer, arranged alternate to the pixel electrodes and connected to the drain electrodes, each common electrode having an edge spaced apart from an edge of the pixel electrodes and substantially parallel to the edge of the pixel electrodes.
Abstract:
A liquid crystal display is provided, which includes a plurality of pixel electrodes, a common electrode facing the pixel electrodes, a liquid crystal display formed between the pixel electrodes and the common electrode, and a plurality of slope members formed on the common electrode and having a ridge and an inclined surface. The slope members include a plurality of pixel slope members facing the pixel electrodes and a plurality of connection slope members for connecting neighboring pixel slope members.