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    Device for cooling current lines of superconducting rotating machine
    71.
    发明授权
    Device for cooling current lines of superconducting rotating machine 有权
    用于冷却超导旋转机的电流线的装置

    公开(公告)号：US07915770B2

    公开(公告)日：2011-03-29

    申请号：US12402045

    申请日：2009-03-11

    Applicant: Jung hyun Lee ,  Je heon Jung ,  Woon sik Kwon ,  Heui joo Park ,  Chi whan Lee ,  Yeong chun Kim

    Inventor： Jung hyun Lee ,  Je heon Jung ,  Woon sik Kwon ,  Heui joo Park ,  Chi whan Lee ,  Yeong chun Kim

    IPC: H02K9/00 ,  H02K9/20 ,  H02K9/22 ,  H02K9/26

    CPC classification number: H02K55/00 ,  H02K9/22 ,  Y02E40/62

    Abstract: A cooling device for current lines of a superconducting rotating machine, which is capable of removing heat generated from the current lines of the superconducting rotating machine, thereby effectively preventing a superconducting coil from being deformed due to the heat generated from the current lines, is disclosed. The cooling device includes heat conduction members respectively mounted to outer surfaces of the current lines. Each heat conduction member is in contact with an inner peripheral surface of the stator such that the heat conduction member transfers, to the stator, heat generated from a corresponding one of the current lines. The heat conduction member further includes insulators each surrounding a corresponding one of the current lines between a corresponding one of the heat conduction members and a power slip ring arranged in the stator, to thermally insulate the heat generated from the corresponding current line.

    Abstract translation: 公开了一种用于超导旋转机器的电流线路的冷却装置，其能够去除由超导旋转电机的电流线产生的热量，从而有效地防止超导线圈由于从电流线产生的热而变形。 。 冷却装置包括分别安装到电流线的外表面的导热构件。 每个导热构件与定子的内周面接触，使得导热构件向定子传递从相应的一条电流线产生的热量。 导热构件还包括绝缘体，每个绝缘体围绕相应的一个导热构件和布置在定子中的动力滑环之间的相应的一条电流线，以使从相应的电流线产生的热量绝热。

    Nonvolatile memory device made of resistance material and method of fabricating the same
    72.
    发明申请
    Nonvolatile memory device made of resistance material and method of fabricating the same 有权
    由电阻材料制成的非易失性存储器件及其制造方法

    公开(公告)号：US20110008945A1

    公开(公告)日：2011-01-13

    申请号：US12923429

    申请日：2010-09-21

    Applicant: Jung-hyun Lee ,  Sung-kyu Choi ,  Kyu-sik Kim

    Inventor： Jung-hyun Lee ,  Sung-kyu Choi ,  Kyu-sik Kim

    IPC: H01L21/02

    CPC classification number: H01L45/04 ,  H01L27/2436 ,  H01L45/1233 ,  H01L45/146 ,  H01L45/1616 ,  H01L45/1683

    Abstract: A nonvolatile memory device using a resistance material and a method of fabricating the same are provided. The nonvolatile memory device includes a switching element, and a data storage part electrically connected to the switching element. In the data storage part, a lower electrode is connected to the switching element, and an insulating layer is formed on the lower electrode to a predetermined thickness. The insulating layer has a contact hole exposing the lower electrode. A data storage layer is filled in the contact hole and the data storage layer is formed of transition metal oxide. An upper electrode is formed on the insulating layer and the data storage layer.

    Abstract translation: 提供了使用电阻材料的非易失性存储器件及其制造方法。 非易失性存储器件包括开关元件和电连接到开关元件的数据存储部件。 在数据存储部分中，下电极连接到开关元件，并且在下电极上形成预定厚度的绝缘层。 绝缘层具有暴露下电极的接触孔。 数据存储层填充在接触孔中，数据存储层由过渡金属氧化物形成。 在绝缘层和数据存储层上形成上电极。

    Attenuated phase-shift photomasks, method of fabricating the same and method of fabricating semiconductor using the same
    74.
    发明申请
    Attenuated phase-shift photomasks, method of fabricating the same and method of fabricating semiconductor using the same 审中-公开
    衰减相移光掩模，其制造方法和使用其制造半导体的方法

    公开(公告)号：US20100255409A1

    公开(公告)日：2010-10-07

    申请号：US12662019

    申请日：2010-03-29

    Applicant: Man-Kyu Kang ,  Ju-Mi Bang ,  Seong-Yoon Kim ,  Jung-Hyun Lee

    Inventor： Man-Kyu Kang ,  Ju-Mi Bang ,  Seong-Yoon Kim ,  Jung-Hyun Lee

    IPC: G03F1/00 ,  G03F7/20

    CPC classification number: G03F1/32

    Abstract: A method of fabricating an attenuated phase-shift photomask includes forming a phase-shift material layer on a photomask substrate, forming a light opaque layer on the phase-shift material layer, forming a first resist pattern on the light opaque layer to selectively expose a pattern region, etching the light opaque layer using the first resist pattern as an etch mask, such that a first light opaque pattern layer is formed to selectively expose the phase-shift material layer, removing the first resist pattern, forming a second resist pattern on the light opaque layer, such that a cell pattern block in the pattern region is selectively exposed, and etching the exposed phase-shift material layer using the first light opaque pattern layer as an etch mask to form a phase-shift material pattern layer selectively exposing a top surface of the photomask substrate.

    Abstract translation: 一种制造衰减的相移光掩模的方法包括在光掩模基板上形成相移材料层，在相移材料层上形成不透光层，在不透光层上形成第一抗蚀剂图案，以选择性地曝光 使用第一抗蚀剂图案作为蚀刻掩模蚀刻不透光层，使得形成第一不透光图案层以选择性地暴露相移材料层，去除第一抗蚀剂图案，在第二抗蚀剂图案上形成第二抗蚀剂图案 使得不透明层，使得图案区域中的单元图案块被选择性地暴露，并且使用第一不透光图案层作为蚀刻掩模来蚀刻暴露的相移材料层，以形成选择性地暴露的相移材料图案层 光掩模衬底的顶表面。

    Semiconductor memory device with three dimensional solid electrolyte structure, and manufacturing method thereof
    76.
    发明申请
    Semiconductor memory device with three dimensional solid electrolyte structure, and manufacturing method thereof 失效
    具有三维固体电解质结构的半导体存储器件及其制造方法

    公开(公告)号：US20100190291A1

    公开(公告)日：2010-07-29

    申请号：US12662101

    申请日：2010-03-31

    Applicant: Jung-hyun Lee ,  Kyu-sik Kim

    Inventor： Jung-hyun Lee ,  Kyu-sik Kim

    IPC: H01L21/02

    CPC classification number: H01C7/006 ,  G11C11/56 ,  G11C13/0009 ,  G11C2213/71 ,  G11C2213/72 ,  G11C2213/79 ,  H01L27/2409 ,  H01L27/2436 ,  H01L45/085 ,  H01L45/1233 ,  H01L45/1273 ,  H01L45/143 ,  H01L45/144 ,  H01L45/1616

    Abstract: The semiconductor memory device includes a variable resistance device having a solid electrolyte in a three-dimensional structure. The variable resistance device includes a first electrode; the solid electrolyte, which has at least two regions with different heights, formed on the first electrode; and a second electrode made of a conductive material formed on the solid electrolyte to cover the regions with different heights. In addition, a multibit semiconductor memory device is provided which includes a bias circuit that can control the intensity of a current and time the current is supplied to the variable resistance device inside a memory cell in multiple steps to configure multibits.

    Abstract translation: 半导体存储器件包括具有三维结构的固体电解质的可变电阻器件。 可变电阻装置包括第一电极; 在第一电极上形成具有至少两个具有不同高度的区域的固体电解质; 以及由在固体电解质上形成的导电材料制成的第二电极，以覆盖不同高度的区域。 此外，提供了一种多位半导体存储器件，其包括偏置电路，该偏置电路可以在多个步骤中以多个步骤来控制电流的强度和电流被提供给存储器单元内的可变电阻器件的时间，以配置多个比特。

    Multi-bit memory device having reristive material layers as storage node and methods of manufacturing and operating the same
    77.
    发明申请
    Multi-bit memory device having reristive material layers as storage node and methods of manufacturing and operating the same 有权
    具有作为存储节点的重排材料层的多位存储器件及其制造和操作方法

    公开(公告)号：US20100187492A1

    公开(公告)日：2010-07-29

    申请号：US12662102

    申请日：2010-03-31

    Applicant: Jung-hyun Lee

    Inventor： Jung-hyun Lee

    IPC: H01L45/00

    CPC classification number: H01L45/144 ,  G11C11/56 ,  G11C11/5678 ,  G11C13/0004 ,  H01L27/2436 ,  H01L45/06 ,  H01L45/12 ,  H01L45/1233 ,  H01L45/146 ,  H01L45/1675

    Abstract: Provided are a multi-bit memory device having resistive material layers as a storage node, and methods of manufacturing and operating the same. The memory device includes a substrate, a transistor formed on the substrate, and a storage node coupled to the transistor, wherein the storage node includes: a lower electrode connected to the substrate; a first phase change layer formed on the lower electrode; a first barrier layer overlying the first phase change layer; a second phase change layer overlying the first barrier layer; and an upper electrode formed on the second phase change layer.

    Abstract translation: 提供了具有作为存储节点的电阻材料层的多位存储器件及其制造和操作方法。 存储器件包括衬底，形成在衬底上的晶体管和耦合到晶体管的存储节点，其中存储节点包括：连接到衬底的下电极; 形成在下电极上的第一相变层; 覆盖所述第一相变层的第一阻挡层; 覆盖第一阻挡层的第二相变层; 和形成在第二相变层上的上电极。

    MULTI-SCALE CANTILEVER STRUCTURES HAVING NANO SIZED HOLES AND METHOD OF PREPARING THE SAME
    80.
    发明申请
    MULTI-SCALE CANTILEVER STRUCTURES HAVING NANO SIZED HOLES AND METHOD OF PREPARING THE SAME 有权
    具有纳米尺寸的多个锥形结构及其制备方法

    公开(公告)号：US20100136490A1

    公开(公告)日：2010-06-03

    申请号：US12245940

    申请日：2008-10-06

    Applicant: Jung Hyun Lee ,  Pyung Soo Lee ,  Kun Hong Lee ,  Nayoung Shin

    Inventor： Jung Hyun Lee ,  Pyung Soo Lee ,  Kun Hong Lee ,  Nayoung Shin

    IPC: G03F7/20

    CPC classification number: B81C1/0015 ,  G01N29/036 ,  G01N2291/0256

    Abstract: Provided are a multi-scale cantilever structure having nano-sized holes prepared by anodic oxidation and a method of preparing the same. The multi-scale cantilever structure is prepared using anodic oxidation and electro-polishing so that a manufacturing process is simple and a manufacturing cost is inexpensive. In addition, the multi-scale cantilever structure has a porous structure having a plurality of nano-sized holes inside thereof, and thus a surface area of the cantilever structure can be maximized. Therefore, when the cantilever structure is used in a sensor, the sensor can have improved sensitivity and selectivity.

    Abstract translation: 提供了具有通过阳极氧化制备的纳米尺寸的孔的多尺度悬臂结构及其制备方法。 使用阳极氧化和电抛光制备多尺度悬臂结构，使得制造工艺简单并且制造成本便宜。 此外，多尺度悬臂结构具有在其内部具有多个纳米尺寸的孔的多孔结构，因此可以使悬臂结构的表面积最大化。 因此，当传感器中使用悬臂结构时，传感器可以提高灵敏度和选择性。

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