公开(公告)号：US06492258B1

公开(公告)日：2002-12-10

申请号：US09881831

申请日：2001-06-14

Applicant: Minh Van Ngo ,  Paul R. Besser ,  Matthew Buynoski ,  John Caffall ,  Nick Maccrae ,  Richard J. Huang ,  Khanh Tran

Inventor： Minh Van Ngo ,  Paul R. Besser ,  Matthew Buynoski ,  John Caffall ,  Nick Maccrae ,  Richard J. Huang ,  Khanh Tran

IPC: H01L214763

CPC classification number: H01L21/7685 ,  H01L21/76837 ,  H01L21/76858 ,  H01L21/76885 ,  H01L23/53223 ,  H01L2221/1078 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A method for making 0.25-micron semiconductor chips includes annealing the metal interconnect lines prior to depositing an inter-layer dielectric (ILD) between the lines. During annealing, an alloy of aluminum and titanium forms, which subsequently volumetrically contracts, with the contraction being absorbed by the aluminum. Because the alloy is reacted prior to ILD deposition, however, the aluminum is not constrained by the ILD when it attempts to absorb the contraction of the alloy. Consequently, the likelihood of undesirable void formation. in the interconnect lines is reduced. The likelihood of undesirable void formation is still further reduced during the subsequent ILD gapfill deposition process by using relatively low bias power to reduce vapor deposition temperature. and by using relatively low source gas deposition flow rates to reduce flow-induced compressive stress on the interconnect lines during ILD formation.

Abstract translation: 制造0.25微米半导体芯片的方法包括在线之间沉积层间电介质（ILD）之前退火金属互连线。 在退火期间，形成铝和钛的合金，其随后容积收缩，铝的收缩被铝吸收。 因为合金在ILD沉积之前反应，所以当铝试图吸收合金的收缩时，铝不受ILD的约束。 因此，形成不希望的空隙的可能性。 在互连线路中减少。 在随后的ILD间隙填充沉积过程中，通过使用相对低的偏压功率来降低气相沉积温度，仍然进一步降低了不希望的空隙形成的可能性。 并且通过使用相对低的源气体沉积流速来减少在ILD形成期间在互连线上的流动引起的压缩应力。

公开(公告)号：US6100179A

公开(公告)日：2000-08-08

申请号：US415218

申请日：1999-10-12

Applicant: Khanh Tran

Inventor： Khanh Tran

IPC: H01L23/532 ,  H01L21/4763

CPC classification number: H01L23/53223 ,  H01L23/5329 ,  H01L2924/0002

Abstract: Spacings between metal features are gap filled with HSQ without degradation of the electromigration resistance by depositing a conformal dielectric liner encapsulating the metal features before depositing the HSQ gap fill layer. Embodiments include depositing a conformal layer of a high density plasma oxide by high density plasma chemical deposition to a thickness of about 100 .ANG. to about 1,000 .ANG..

公开(公告)号：US6060384A

公开(公告)日：2000-05-09

申请号：US177482

申请日：1998-10-23

Applicant: Robert C. Chen ,  Jeffrey A. Shields ,  Robert Dawson ,  Khanh Tran

Inventor： Robert C. Chen ,  Jeffrey A. Shields ,  Robert Dawson ,  Khanh Tran

IPC: H01L21/316 ,  H01L21/314 ,  H01L21/768 ,  H01L21/44

CPC classification number: H01L21/314 ,  H01L21/76826 ,  H01L2924/0002

Abstract: Spin-on HSQ is employed to gap fill metal layers in manufacturing a high density, multi-metal layer semiconductor device. The degradation of deposited HSQ layers during formation of borderless vias, as from photoresist stripping using an O.sub.2 -containing plasma, is overcome by treating the degraded HSQ layer with an H.sub.2 -containing plasma to restore the dangling Si--H bonds, thereby passivating the surface and preventing moisture absorption, before filling the via opening with conductive material, such as a barrier layer.

Abstract translation: 旋转HSQ用于制造高密度多金属层半导体器件的间隙填充金属层。 在形成无边界通孔期间沉积的HSQ层的退化，如使用含O 2等离子体的光致抗蚀剂剥离，通过用含H2的等离子体处理降解的HSQ层来恢复悬挂的Si-H键，从而钝化表面 并且在用导电材料（例如阻挡层）填充通孔开口之前防止吸湿。

公开(公告)号：US6034420A

公开(公告)日：2000-03-07

申请号：US993051

申请日：1997-12-18

Applicant: Khanh Tran

Inventor： Khanh Tran

IPC: H01L23/532 ,  H01L23/58

CPC classification number: H01L23/53223 ,  H01L23/5329 ,  H01L2924/0002

Abstract: Spacings between metal features are gap filled with HSQ without degradation of the electromigration resistance by depositing a conformal dielectric liner encapsulating the metal features before depositing the HSQ gap fill layer. Embodiments include depositing a conformal layer of a high density plasma oxide by high density plasma chemical deposition to a thickness of about 100 .ANG. to about 1,000 .ANG..

Abstract translation: 通过在沉积HSQ间隙填充层之前沉积封装金属特征的共形电介质衬垫，金属特征之间的间距通过HSQ间隙填充而不降低电迁移阻力。 实施例包括通过高密度等离子体化学沉积沉积高密度等离子体氧化物的保形层至约100至约1000的厚度。