公开(公告)号：US20190252328A1

公开(公告)日：2019-08-15

申请号：US16390877

申请日：2019-04-22

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Shin-Puu Jeng ,  Clinton Chao ,  Szu-Wei Lu

IPC分类号： H01L23/00 ,  H01L23/52 ,  H01L21/56 ,  H01L21/78 ,  H01L21/302 ,  H01L21/02 ,  H01L21/3205 ,  H01L21/306 ,  H01L21/304

CPC分类号： H01L23/562 ,  H01L21/02123 ,  H01L21/0214 ,  H01L21/02274 ,  H01L21/02282 ,  H01L21/302 ,  H01L21/304 ,  H01L21/30625 ,  H01L21/314 ,  H01L21/316 ,  H01L21/3185 ,  H01L21/32051 ,  H01L21/563 ,  H01L21/565 ,  H01L21/78 ,  H01L23/52 ,  H01L23/585 ,  H01L24/05 ,  H01L24/48 ,  H01L24/81 ,  H01L24/85 ,  H01L24/96 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/16227 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48106 ,  H01L2224/48175 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/01019 ,  H01L2924/01078 ,  H01L2924/01327 ,  H01L2924/09701 ,  H01L2924/10253 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/3511 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： Warpage and breakage of integrated circuit substrates is reduced by compensating for the stress imposed on the substrate by thin films formed on a surface of the substrate. Particularly advantageous for substrates having a thickness substantially less than about 150 μm, a stress-tuning layer is formed on a surface of the substrate to substantially offset or balance stress in the substrate which would otherwise cause the substrate to bend. The substrate includes a plurality of bonding pads on a first surface for electrical connection to other component.

公开(公告)号：US20160181209A1

公开(公告)日：2016-06-23

申请号：US15056615

申请日：2016-02-29

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Shin-Puu Jeng ,  Clinton Chao ,  Szu Wei Lu

IPC分类号： H01L23/00 ,  H01L21/56 ,  H01L21/78

CPC分类号： H01L23/562 ,  H01L21/02123 ,  H01L21/02274 ,  H01L21/02282 ,  H01L21/302 ,  H01L21/314 ,  H01L21/316 ,  H01L21/3185 ,  H01L21/563 ,  H01L21/78 ,  H01L23/52 ,  H01L23/585 ,  H01L24/48 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/01019 ,  H01L2924/01078 ,  H01L2924/01327 ,  H01L2924/09701 ,  H01L2924/10253 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： Warpage and breakage of integrated circuit substrates is reduced by compensating for the stress imposed on the substrate by thin films formed on a surface of the substrate. Particularly advantageous for substrates having a thickness substantially less than about 150 μm, a stress-tuning layer is formed on a surface of the substrate to substantially offset or balance stress in the substrate which would otherwise cause the substrate to bend. The substrate includes a plurality of bonding pads on a first surface for electrical connection to other component.

摘要翻译： 通过在衬底的表面上形成的薄膜补偿施加在衬底上的应力来减小集成电路衬底的翘曲和断裂。 对于厚度基本上小于约150μm的衬底特别有利的是，在衬底的表面上形成应力调节层，以基本上抵消或平衡衬底中的应力，否则会使衬底弯曲。 衬底包括在第一表面上的多个接合焊盘，用于与其它部件电连接。

公开(公告)号：US20150235962A1

公开(公告)日：2015-08-20

申请号：US14702507

申请日：2015-05-01

申请人： Renesas Electronics Corporation

发明人： Junji NOGUCHI ,  Takayuki OSHIMA ,  Noriko MIURA ,  Kensuke ISHIKAWA ,  Tomio IWASAKI ,  Kiyomi KATSUYAMA ,  Tatsuyuki SAITO ,  Tsuyoshi TAMARU ,  Hizuru YAMAGUCHI

IPC分类号： H01L23/532 ,  H01L23/528

CPC分类号： H01L21/76811 ,  H01L21/314 ,  H01L21/76801 ,  H01L21/76802 ,  H01L21/76807 ,  H01L21/76813 ,  H01L21/76814 ,  H01L21/76822 ,  H01L21/76832 ,  H01L21/76834 ,  H01L21/76838 ,  H01L21/76843 ,  H01L21/76846 ,  H01L21/76849 ,  H01L21/76883 ,  H01L23/485 ,  H01L23/5226 ,  H01L23/528 ,  H01L23/53228 ,  H01L23/53238 ,  H01L23/53295 ,  H01L2924/0002 ,  H01L2924/00

摘要： The reliability of wirings, each of which includes a main conductive film containing copper as a primary component, is improved. On an insulating film including the upper surface of a wiring serving as a lower layer wiring, an insulating film formed of a silicon carbonitride film having excellent barrier properties to copper is formed; on the insulating film, an insulating film formed of a silicon carbide film having excellent adhesiveness to a low dielectric constant material film is formed; on the insulating film, an insulating film formed of a low dielectric constant material as an interlayer insulating film is formed; and thereafter a wiring as an upper layer wiring is formed.

公开(公告)号：US09093526B2

公开(公告)日：2015-07-28

申请号：US13713085

申请日：2012-12-13

申请人： GLOBALFOUNDRIES Inc.

发明人： Peter Javorka ,  Juergen Faul ,  Bastian Haussdoerfer

IPC分类号： H01L21/311 ,  H01L29/78 ,  H01L21/314 ,  H01L29/66

CPC分类号： H01L29/7833 ,  H01L21/31116 ,  H01L21/314 ,  H01L29/66598 ,  H01L29/78

摘要： A method of forming a spacer is disclosed that involves forming a layer of spacer material above an etch stop layer, performing a first main etching process on the layer of spacer material to remove some of material, stopping the etching process prior to exposing the etch stop layer and performing a second over-etch process on the layer of spacer material, using the following parameters: an inert gas flow rate of about 50-200 sscm, a reactive gas flow rate of about 3-20 sscm, a passivating gas flow rate of about 3-20 sscm, a processing pressure about 5-15 mT, a power level of about 200-500 W for ion generation and a bias voltage of about 300-500 V. A device includes a gate structure positioned above a semiconducting substrate, a substantially triangular-shaped sidewall spacer positioned proximate the gate structure and an etch stop layer positioned between the spacer and the gate structure.

摘要翻译： 公开了一种形成间隔物的方法，其包括在蚀刻停止层上方形成间隔物材料层，在间隔物材料层上进行第一主蚀刻工艺以去除一些材料，在暴露蚀刻停止点之前停止蚀刻工艺 层，并且使用以下参数对间隔材料层进行第二过蚀刻工艺：约50-200scscm的惰性气体流速，约3-20scscm的反应气体流速，钝化气体流速 约3-20sccm的加工压力，约5-15mT的加工压力，用于离子产生的约200-500W的功率水平和约300-500V的偏置电压。一种器件包括位于半导体衬底上方的栅极结构 位于栅极结构附近的基本为三角形的侧壁间隔件，以及位于间隔件和栅极结构之间的蚀刻停止层。

公开(公告)号：US09064870B2

公开(公告)日：2015-06-23

申请号：US14320049

申请日：2014-06-30

申请人： Renesas Electronics Corporation

发明人： Junji Noguchi ,  Takayuki Oshima ,  Noriko Miura ,  Kensuke Ishikawa ,  Tomio Iwasaki ,  Kiyomi Katsuyama ,  Tatsuyuki Saito ,  Tsuyoshi Tamaru ,  Hizuru Yamaguchi

IPC分类号： H01L23/52 ,  H01L23/522 ,  H01L21/314 ,  H01L21/768 ,  H01L23/532 ,  H01L23/528

CPC分类号： H01L21/76811 ,  H01L21/314 ,  H01L21/76801 ,  H01L21/76802 ,  H01L21/76807 ,  H01L21/76813 ,  H01L21/76814 ,  H01L21/76822 ,  H01L21/76832 ,  H01L21/76834 ,  H01L21/76838 ,  H01L21/76843 ,  H01L21/76846 ,  H01L21/76849 ,  H01L21/76883 ,  H01L23/485 ,  H01L23/5226 ,  H01L23/528 ,  H01L23/53228 ,  H01L23/53238 ,  H01L23/53295 ,  H01L2924/0002 ,  H01L2924/00

摘要： The reliability of wirings, each of which includes a main conductive film containing copper as a primary component, is improved. On an insulating film including the upper surface of a wiring serving as a lower layer wiring, an insulating film formed of a silicon carbonitride film having excellent barrier properties to copper is formed; on the insulating film, an insulating film formed of a silicon carbide film having excellent adhesiveness to a low dielectric constant material film is formed; on the insulating film, an insulating film formed of a low dielectric constant material as an interlayer insulating film is formed; and thereafter a wiring as an upper layer wiring is formed.

摘要翻译： 提高了布线的可靠性，其中包括以铜为主要成分的主导电膜。 在包括用作下层布线的布线的上表面的绝缘膜上形成由铜的阻隔性优异的碳氮化硅膜形成的绝缘膜; 在绝缘膜上形成由与低介电常数材料膜粘合性优异的碳化硅膜形成的绝缘膜; 在绝缘膜上形成由作为层间绝缘膜的低介电常数材料形成的绝缘膜; 然后形成作为上层布线的布线。

公开(公告)号：US20130140715A1

公开(公告)日：2013-06-06

申请号：US13730611

申请日：2012-12-28

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Shin-Puu Jeng ,  Clinton Chao ,  Szu Wei Lu

IPC分类号： H01L23/52

CPC分类号： H01L23/562 ,  H01L21/02123 ,  H01L21/02274 ,  H01L21/02282 ,  H01L21/302 ,  H01L21/314 ,  H01L21/316 ,  H01L21/3185 ,  H01L21/563 ,  H01L21/78 ,  H01L23/52 ,  H01L23/585 ,  H01L24/48 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/01019 ,  H01L2924/01078 ,  H01L2924/01327 ,  H01L2924/09701 ,  H01L2924/10253 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： Warpage and breakage of integrated circuit substrates is reduced by compensating for the stress imposed on the substrate by thin films formed on a surface of the substrate. Particularly advantageous for substrates having a thickness substantially less than about 150 μm, a stress-tuning layer is formed on a surface of the substrate to substantially offset or balance stress in the substrate which would otherwise cause the substrate to bend. The substrate includes a plurality of bonding pads on a first surface for electrical connection to other component.

摘要翻译： 通过在衬底的表面上形成的薄膜补偿施加在衬底上的应力来减小集成电路衬底的翘曲和断裂。 对于厚度基本上小于约150μm的衬底特别有利的是，在衬底的表面上形成应力调节层，以基本上抵消或平衡衬底中的应力，否则会导致衬底弯曲。 衬底包括在第一表面上的多个接合焊盘，用于与其它部件电连接。

公开(公告)号：US08357593B2

公开(公告)日：2013-01-22

申请号：US12688044

申请日：2010-01-15

申请人： Ki-chul Kim ,  Youn-soo Kim ,  Ki-vin Im ,  Cha-young Yoo ,  Jong-cheol Lee ,  Ki-yeon Park ,  Hoon-sang Choi ,  Se-hoon Oh

发明人： Ki-chul Kim ,  Youn-soo Kim ,  Ki-vin Im ,  Cha-young Yoo ,  Jong-cheol Lee ,  Ki-yeon Park ,  Hoon-sang Choi ,  Se-hoon Oh

IPC分类号： H01L21/322

CPC分类号： H01L21/314 ,  H01L21/02041 ,  H01L21/67034

摘要： Provided are methods of removing water adsorbed or bonded to a surface of a semiconductor substrate, and methods of depositing an atomic layer using the method of removing water described herein. The method of removing water includes applying a chemical solvent to the surface of a semiconductor substrate, and removing the chemical solvent from the surface of the semiconductor substrate.

摘要翻译： 提供了除去吸附或结合到半导体衬底的表面的水的方法，以及使用本文所述除去水的方法沉积原子层的方法。 除去水的方法包括向半导体衬底的表面施加化学溶剂，并从半导体衬底的表面除去化学溶剂。

公开(公告)号：US08048802B2

公开(公告)日：2011-11-01

申请号：US12197335

申请日：2008-08-25

申请人： Ho-Yeong Choe

发明人： Ho-Yeong Choe

IPC分类号： H01L21/44

CPC分类号： H01L21/0272 ,  H01L21/314 ,  H01L21/76819

摘要： A method for forming an interlayer insulating film includes providing a semiconductor substrate having a first substrate region with a plurality of metal wiring and a second substrate region having no metal wiring, and then forming an insulating film dummy pattern in the second substrate region, wherein the insulating film dummy pattern has the same thickness as the metal wiring, and then forming an interlayer insulating film over the semiconductor substrate including the insulating film dummy pattern.

摘要翻译： 一种形成层间绝缘膜的方法包括提供具有多个金属布线的第一基板区域和不具有金属布线的第二基板区域的半导体基板，然后在第二基板区域中形成绝缘膜虚设图案，其中， 绝缘膜虚设图案具有与金属布线相同的厚度，然后在包括绝缘膜虚拟图案的半导体衬底上形成层间绝缘膜。

公开(公告)号：US20110189080A1

公开(公告)日：2011-08-04

申请号：US12658204

申请日：2010-02-04

申请人： Calvin J. Curtis ,  Alexander Miedaner ,  Marinus Franciscus Antonius Maria van Hest ,  David S. Ginley ,  Jennifer Leisch ,  Matthew Taylor ,  Billy J. Stanbery

发明人： Calvin J. Curtis ,  Alexander Miedaner ,  Marinus Franciscus Antonius Maria van Hest ,  David S. Ginley ,  Jennifer Leisch ,  Matthew Taylor ,  Billy J. Stanbery

IPC分类号： B05D5/12 ,  C01B19/04 ,  H01L21/314 ,  H01L21/36

CPC分类号： B05D5/12 ,  C01B19/04 ,  H01L21/02521 ,  H01L21/314

摘要： Precursor compositions containing copper and selenium suitable for deposition on a substrate to form thin films suitable for semi-conductor applications. Methods of forming the precursor compositions using primary amine solvents and methods of forming the thin films wherein the selection of temperature and duration of heating controls the formation of a targeted species of copper selenide.

公开(公告)号：US20110140124A1

公开(公告)日：2011-06-16

申请号：US13028505

申请日：2011-02-16

申请人： Ramon R. Collazo ,  Zlatko Sitar ,  Rafael Dalmau

发明人： Ramon R. Collazo ,  Zlatko Sitar ,  Rafael Dalmau

IPC分类号： H01L29/20

CPC分类号： H01L21/306 ,  C30B29/403 ,  C30B33/10 ,  H01L21/314 ,  H01L33/0095 ,  Y10T428/12528

摘要： The present invention provides methods of protecting a surface of an aluminum nitride substrate. The substrate with the protected surface can be stored for a period of time and easily activated to be in a condition ready for thin film growth or other processing. In certain embodiments, the method of protecting the substrate surface comprises forming a passivating layer on at least a portion of the substrate surface by performing a wet etch, which can comprise the use of one or more organic compounds and one or more acids. The invention also provides aluminum nitride substrates having passivated surfaces.

摘要翻译： 本发明提供了保护氮化铝衬底表面的方法。 具有受保护表面的基底可以储存一段时间并且易于活化以处于准备进行薄膜生长或其它处理的状态。 在某些实施方案中，保护底物表面的方法包括通过执行湿法蚀刻在基材表面的至少一部分上形成钝化层，该湿蚀刻可以包括使用一种或多种有机化合物和一种或多种酸。 本发明还提供具有钝化表面的氮化铝衬底。