公开(公告)号：US20180211578A1

公开(公告)日：2018-07-26

申请号：US15783620

申请日：2017-10-13

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Xiaomang ZHANG ,  Xue DONG ,  Jing LV

IPC: G09G3/20

CPC classification number: G09G3/2003 ,  G09G2300/0452 ,  G09G2320/0666

Abstract: The present disclosure provides a pixel array, a display device and a display method thereof. The pixel array includes first display blocks and second display blocks arranged in an array. The first display blocks and the second display blocks are arranged by turns in a first direction. Each display block includes a first subpixel, a second subpixel, a third subpixel, a fourth subpixel and a fifth subpixel arranged in two adjacent lines, the first subpixel, the second subpixel and the third subpixel are arranged in a line, and the fourth subpixel and the fifth subpixel are arranged in a line. A gap between any two adjacent subpixels in an ith line is aligned in an extension direction of the gap with a subpixel in an (i+1)th line.

公开(公告)号：US20180101052A1

公开(公告)日：2018-04-12

申请号：US15545338

申请日：2017-01-06

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Yafeng YANG ,  Jing LV

IPC: G02F1/1335

CPC classification number: G02F1/133514 ,  G02F1/133524 ,  G02F1/133603 ,  G02F1/133606 ,  G02F1/133609 ,  G02F2001/133567 ,  G02F2001/133607 ,  G02F2001/134354

Abstract: A display module, a manufacturing method thereof and a corresponding display device are disclosed. The display module includes a pixel unit at least having a first subpixel, a second subpixel and a third subpixel. The display module further includes at least one prism structure arranged on a light incident side of the pixel unit. After incident light passes through the prism structure, the incident light is at least split into light of a first waveband incident on the first subpixel, light of a second waveband incident on the second subpixel and light of a third waveband incident on the third subpixel, wherein the first waveband, the second waveband and the third waveband are different from each other.

公开(公告)号：US20150333159A1

公开(公告)日：2015-11-19

申请号：US14805976

申请日：2015-07-22

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Kuanjun PENG ,  Jing LV

IPC: H01L29/66 ,  H01L29/24 ,  H01L29/49 ,  H01L21/02 ,  G02F1/1368 ,  H01L29/786

CPC classification number: H01L29/66969 ,  G02F1/1368 ,  H01L21/02282 ,  H01L27/1225 ,  H01L29/24 ,  H01L29/4908 ,  H01L29/7869

Abstract: A method for manufacturing thin film transistor array substrate is disclosed. The method includes sequentially depositing a semiconductor layer and an ohmic contact layer on the base substrate formed with a gate insulator and patterning the semiconductor layer and the ohmic contact layer, wherein the material of the semiconductor layer is zinc oxide, and the material of the ohmic contact layer is GaxZn1-xO, where 0

Abstract translation: 公开了薄膜晶体管阵列基板的制造方法。 该方法包括在形成有栅极绝缘体的基底衬底上依次沉积半导体层和欧姆接触层，并对半导体层和欧姆接触层进行构图，其中半导体层的材料是氧化锌，欧姆的材料 接触层是GaxZn1-xO，其中0