Keyhole echo-planar imaging with double (t1 and t2*) contrast (dc-epic)
    72.
    发明申请
    Keyhole echo-planar imaging with double (t1 and t2*) contrast (dc-epic) 有权
    具有双重(t1和t2 *)对比度(dc-epic)的键孔回波平面成像

    公开(公告)号:US20060091882A1

    公开(公告)日:2006-05-04

    申请号:US10514801

    申请日:2003-05-14

    CPC classification number: G01R33/50 G01R33/561 G01R33/5616

    Abstract: The invention relates to a method for examining at least one object during which properties of the object are detected at different times within a spatial frequency space formed by spatial frequencies. According to the invention, the method is carried out in such a manner that temporally consecutive recordings ensue in overlapping regions of the spatial frequency space and additionally in regions of the spatial frequency space that differ from one another.

    Abstract translation: 本发明涉及一种用于检查至少一个物体的方法,在该物体期间,在由空间频率形成的空间频率空间内的不同时间检测物体的特性。 根据本发明,该方法以这样的方式进行,使得时间上连续的记录在空间频率空间的重叠区域中以及另外在彼此不同的空间频率空间的区域中。

    Pixelated color management display
    74.
    发明申请
    Pixelated color management display 有权
    像素化色彩管理显示

    公开(公告)号:US20060082560A1

    公开(公告)日:2006-04-20

    申请号:US10969412

    申请日:2004-10-20

    CPC classification number: G09G3/3413 H04N9/3108

    Abstract: A display system includes a light source, a spatial light homogenizer, and imaging optics. The spatial light modulator has a plurality of modulator pixels. The display system also includes a pixelated plate illuminated by the light source. The pixelated plate has a plurality of individually defined pixels formed thereon. The spatial light modulator is in optical communication with the pixelated color management device by the imaging optics and each of the modulator pixels is associated with at least one of the individually defined pixels of the pixelated plate.

    Abstract translation: 显示系统包括光源,空间光均化器和成像光学器件。 空间光调制器具有多个调制器像素。 显示系统还包括由光源照亮的像素化板。 像素化板在其上形成有多个单独限定的像素。 空间光调制器通过成像光学器件与像素化颜色管理装置光学通信,并且每个调制器像素与像素化板的单独限定的像素中的至少一个相关联。

    Generating and displaying spatially offset sub-frames
    75.
    发明申请
    Generating and displaying spatially offset sub-frames 审中-公开
    生成和显示空间偏移子帧

    公开(公告)号:US20050275669A1

    公开(公告)日:2005-12-15

    申请号:US10868638

    申请日:2004-06-15

    CPC classification number: G06T3/40 G09G3/007 G09G3/20 G09G2340/0435

    Abstract: A method of displaying an image with a display device is provided. The method comprises receiving image data comprising a first portion and a second portion for the image, generating a first plurality of sub-frames using the first portion and a simulation kernel, generating a second plurality of updated sub-frames using the second portion and the simulation kernel independently from generating the first plurality of sub-frames, and alternating between displaying a first one of the first plurality of updated sub-frames in a first position, displaying a second one of the first plurality of updated sub-frames in a second position spatially offset from the first position, displaying a first one of the second plurality of updated sub-frames in a third position spatially offset from the first and the second positions, and displaying a second one of the second plurality of updated sub-frames in a fourth position spatially offset from the first, the second, and the third positions.

    Abstract translation: 提供了一种用显示装置显示图像的方法。 该方法包括:接收图像数据,该图像数据包括图像的第一部分和第二部分,使用第一部分和模拟核心生成第一多个子帧,使用第二部分生成第二多个更新的子帧, 模拟内核独立于生成第一多个子帧,并且在第一位置中显示第一多个更新子帧中的第一个之间交替显示第二个更新子帧中的第二个子帧 位置与第一位置空间偏移,在第二位置的空间上偏移的第三位置显示第二多个更新子帧中的第一位置,并且将第二多个更新子帧中的第二个显示在 从第一位置,第二位置和第三位置空间偏移的第四位置。

    Generating and displaying spatially offset sub-frames
    76.
    发明申请
    Generating and displaying spatially offset sub-frames 失效
    生成和显示空间偏移子帧

    公开(公告)号:US20050225568A1

    公开(公告)日:2005-10-13

    申请号:US10820952

    申请日:2004-04-08

    Applicant: David Collins

    Inventor: David Collins

    CPC classification number: G06T5/50

    Abstract: A method of displaying an image with a display device comprises receiving image data for the image, generating first and second sub-frames where the first and the second sub-frames comprise a plurality of sub-frame pixel values and a plurality of error values and where at least a first one of the plurality of sub-frame pixel values is calculated using the image data, at least a second one of the plurality of sub-frame pixel values, and at least one of the plurality of error values, and alternating between displaying the first sub-frame in a first position and displaying the second sub-frame in a second position spatially offset from the first position is provided.

    Abstract translation: 一种用显示装置显示图像的方法包括接收图像的图像数据,产生第一和第二子帧,其中第一和第二子帧包括多个子帧像素值和多个误差值,以及 其中使用所述图像数据,所述多个子帧像素值中的至少第二个以及所述多个误差值中的至少一个来计算所述多个子帧像素值中的至少第一个,并且交替地 提供在第一位置显示第一子帧和在与第一位置空间偏移的第二位置显示第二子帧之间。

    Computer memory initialization
    77.
    发明申请
    Computer memory initialization 有权
    计算机内存初始化

    公开(公告)号:US20050154850A1

    公开(公告)日:2005-07-14

    申请号:US10753276

    申请日:2004-01-08

    Applicant: David Collins

    Inventor: David Collins

    CPC classification number: G06F9/4403

    Abstract: Computer memory is initialized by generating configuration data for a portion of memory, saving the configuration data, restarting computer memory initialization, copying the saved configuration data to initialize the portion of memory, and using the portion of memory to execute instructions to initialize a remainder of memory.

    Abstract translation: 通过生成一部分存储器的配置数据来初始化计算机存储器,保存配置数据,重新启动计算机存储器初始化,复制保存的配置数据以初始化存储器的一部分,以及使用该部分存储器来执行指令以初始化剩余部分 记忆。

    ESD DESIGN, VERIFICATION AND CHECKING SYSTEM AND METHOD OF USE
    78.
    发明申请
    ESD DESIGN, VERIFICATION AND CHECKING SYSTEM AND METHOD OF USE 失效
    ESD设计,验证和检查系统及其使用方法

    公开(公告)号:US20050102644A1

    公开(公告)日:2005-05-12

    申请号:US10605960

    申请日:2003-11-10

    CPC classification number: G06F17/5036

    Abstract: A computerized method and system for designing, verification and checking of the electrostatic discharge (ESD) protection circuits and their implementation in a integrated computer chip design where the computer chip comprises of electronic circuits designed in a parameterized cell design system, pads, interconnects and the ESD system uses a hierarchical system of parameterized cells (p-cells) which are constructed into higher level ESD networks. Lowest order p-cells pass user defined parameters to higher order p-cells to form an ESD protection circuit meeting design criteria. Ones of the p-cells are “grow-able” such that they can form repetition groups of the underlying p-cell element to accommodate the design parameters. Layout and circuit schematics are auto-generated with the user varying the number of elements in the circuit by adjusting the input parameters. The circuit topology automation allows for the customer to auto generate new ESD circuits and ESD power clamps without additional design work.

    Abstract translation: 一种用于设计,验证和检查静电放电(ESD)保护电路的计算机化方法和系统及其在集成计算机芯片设计中的实现,其中计算机芯片包括在参数化单元设计系统,焊盘,互连和 ESD系统使用构建到更高级别ESD网络中的参数化单元(p-cell)的分层系统。 最低阶p单元将用户定义的参数传递到高阶p单元,以形成符合设计标准的ESD保护电路。 p细胞的一部分是“可生长的”,使得它们可以形成下面的p细胞元件的重复组以适应设计参数。 布局和电路原理图是通过用户通过调整输入参数来改变电路中的元件数量而自动生成的。 电路拓扑自动化允许客户自动生成新的ESD电路和ESD电源夹,而无需额外的设计工作。

    Floating interface for integrated circuit test head
    80.
    发明授权
    Floating interface for integrated circuit test head 有权
    集成电路测试头浮动接口

    公开(公告)号:US06377062B1

    公开(公告)日:2002-04-23

    申请号:US09539361

    申请日:2000-03-31

    CPC classification number: G01R1/07378

    Abstract: A floating interface assembly provides signal paths between an integrated circuit (IC) test head and contact pads on a load board or probe card accessing an IC to be tested. Pogo pins or other contactors for contacting the contact pads are mounted on the interface assembly and linked to the test head by flexible conductors. The interface assembly is attached to the test head by springs to allow it the freedom to rotate to some extent about any axis. As the test head approaches the contact pads, alignment pins engage and orient the interface assembly so that its contactors will mate with the contact pads. As the contactors come into contact with the contact pads, the interface assembly adjusts the plane of the contactors so as to evenly distribute contact pressure over all contactor pads.

    Abstract translation: 浮动接口组件提供集成电路(IC)测试头和访问要测试的IC的负载板或探针卡上的接触焊盘之间的信号路径。 用于接触接触垫的Pogo引脚或其他接触器安装在接口组件上,并通过柔性导体连接到测试头。 接口组件通过弹簧连接到测试头,以允许其在任何轴线上自由旋转到某种程度。 当测试头靠近接触垫时,对准销接合和定向接口组件,使得其接触器将与接触垫配合。 当接触器与接触垫接触时,接口组件调节接触器的平面,以便在所有接触器垫上均匀分布接触压力。

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