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    BIPOLAR JUNCTION TRANSISTORS WITH A NANOSHEET INTRINSIC BASE
    71.
    发明申请
    BIPOLAR JUNCTION TRANSISTORS WITH A NANOSHEET INTRINSIC BASE 有权

    公开(公告)号：US20230071998A1

    公开(公告)日：2023-03-09

    申请号：US17551346

    申请日：2021-12-15

    Applicant: GlobalFoundries U.S. Inc.

    Inventor： Haiting Wang ,  Hong Yu ,  Zhenyu Hu

    IPC: H01L29/737 ,  H01L29/06 ,  H01L29/165 ,  H01L21/02 ,  H01L29/66

    Abstract: Structures for a bipolar junction transistor and methods of fabricating a structure for a bipolar junction transistor. The structure includes a collector having a first semiconductor layer, an emitter having a second semiconductor layer, an intrinsic base including nanosheet channel layers positioned with a spaced arrangement in a layer stack, and a base contact laterally positioned between the first and second semiconductor layers. Each nanosheet channel layer extends laterally from the first semiconductor layer to the second semiconductor layer. Sections of the base contact are respectively positioned in spaces between the nanosheet channel layers. The structure further includes first spacers laterally positioned between the sections of the base contact and the first semiconductor layer, and second spacers laterally positioned between the sections of the base contact and the second semiconductor layer.

    Single fin structures
    73.
    发明授权
    Single fin structures 有权

    公开(公告)号：US11127842B2

    公开(公告)日：2021-09-21

    申请号：US16688267

    申请日：2019-11-19

    Applicant: GLOBALFOUNDRIES U.S. INC.

    Inventor： Haiting Wang ,  Hong Yu ,  Zhenyu Hu

    IPC: H01L29/66 ,  H01L29/78 ,  H01L29/06 ,  H01L21/762 ,  H01L29/45 ,  H01L21/285 ,  H01L29/417

    Abstract: The present disclosure generally relates to semiconductor structures and, more particularly, to single fin structures and methods of manufacture. The structure includes: an active single fin structure; a plurality of dummy fin structures on opposing sides of the active single fin structure; source and drain regions formed on the active single fin structure and the dummy fin structures; recessed shallow trench isolation (STI) regions between the dummy fin structures and the active single fin structure and below a surface of the dummy fin structures; and contacts formed on the source and drain regions of the active single fin structure with a spacing of at least two dummy fin structures on opposing sides of the contacts.

    GATE CUT ISOLATION INCLUDING AIR GAP, INTEGRATED CIRCUIT INCLUDING SAME AND RELATED METHOD
    76.
    发明申请
    GATE CUT ISOLATION INCLUDING AIR GAP, INTEGRATED CIRCUIT INCLUDING SAME AND RELATED METHOD 有权

    公开(公告)号：US20210183997A1

    公开(公告)日：2021-06-17

    申请号：US17185236

    申请日：2021-02-25

    Applicant: GLOBALFOUNDRIES U.S. Inc.

    Inventor： Hong Yu ,  Hui Zang ,  Jiehui Shu

    IPC: H01L29/06 ,  H01L29/66 ,  H01L29/78 ,  H01L27/088 ,  H01L21/033 ,  H01L21/8234 ,  H01L21/764 ,  H01L21/768

    Abstract: A gate cut isolation including an air gap and an IC including the same are disclosed. A method of forming the gate cut isolation may include forming an opening in a dummy gate that extends over a plurality of spaced active regions, the opening positioned between and spaced from a pair of active regions. The opening is filled with a fill material, and the dummy gate is removed. A metal gate is formed in a space vacated by the dummy gate on each side of the fill material, and the fill material is removed to form a preliminary gate cut opening. A liner is deposited in the preliminary gate cut opening, creating a gate cut isolation opening, which is then sealed by depositing a sealing layer. The sealing layer closes an upper end of the gate cut isolation opening and forms the gate cut isolation including an air gap.

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