公开(公告)号：US20060117142A1

公开(公告)日：2006-06-01

申请号：US11331083

申请日：2006-01-13

申请人： Seiji Kaneko ,  Hiroki Kanai

发明人： Seiji Kaneko ,  Hiroki Kanai

IPC分类号： G06F12/00

CPC分类号： G06F12/0866 ,  G06F3/0611 ,  G06F3/0658 ,  G06F3/0659 ,  G06F3/067 ,  G06F3/0689 ,  G06F12/0815 ,  G06F12/0817 ,  Y10S707/99952

摘要： A disk array device is equipped with a plurality of input/output channels that receive data input/output requests from an external device, a plurality of cache memories provided for the corresponding respective input/output channels, each of the cache memories connected to each of the corresponding respective input/output channels, a disk drive device, a disk control module that performs data input/output to and from the disk drive device, and a communication module that communicatively connects the input/output channels with the disk control module. The disk array device also includes a consistency maintaining module that can perform a consistency maintaining processing to maintain consistency of data stored in each of the cache memories. According to the content of the data input/output request received from the external device, an execution order of a response processing to respond to the external device according to the data input/output request and the consistency maintaining processing is controlled.

公开(公告)号：US20060090027A1

公开(公告)日：2006-04-27

申请号：US11298716

申请日：2005-12-12

申请人： Kazuhisa Fujimoto ,  Atsushi Tanaka ,  Akira Fujibayashi ,  Hiroki Kanai ,  Nobuyuki Minowa

发明人： Kazuhisa Fujimoto ,  Atsushi Tanaka ,  Akira Fujibayashi ,  Hiroki Kanai ,  Nobuyuki Minowa

IPC分类号： G06F13/00

CPC分类号： G06F3/0611 ,  G06F3/0613 ,  G06F3/0635 ,  G06F3/0658 ,  G06F3/0683 ,  G06F3/0689 ,  G06F12/084 ,  G06F12/0866 ,  G06F13/122

摘要： A disk array control device which includes a plurality of channel interface (IF) units, a plurality of disk IF units, a cache memory unit, and a shared memory unit. The connection system between the plurality of channel IF units and plurality of disk IF units and the cache memory unit is different from the connection system between the plurality of channel IF units and plurality of disk IF units and the shared memory unit. In the invention the plurality of channel IF units and the plurality of disk IF units are connected via a selector to the cache memory unit whereas the plurality of channel IF units and the plurality of disk IF units are directly connected to the shared memory unit with no selectors.

公开(公告)号：US07020564B2

公开(公告)日：2006-03-28

申请号：US09923340

申请日：2001-08-08

申请人： Aki Tomita ,  Hiroki Kanai

发明人： Aki Tomita ,  Hiroki Kanai

IPC分类号： H04N5/781

CPC分类号： G06F3/0631 ,  G06F3/0605 ,  G06F3/067 ,  Y10S707/99953 ,  Y10S707/99956

摘要： To provide a logical volume administration method capable of reducing a cost of using a storage, a logical volume is constructed by a steady area corresponding to a task of steadily allocating a disk area and a temporary area corresponding to a task of allocating no disk area until allocation of a disk area is requested. The disk area to be allocated to the temporary area is commonly used by a plurality of logical volumes in a time sharing manner. The disk areas are administered in a lump as a disk pool. The cost to each of customers sharing the temporary area is calculated by total use time×use size and is charged.

公开(公告)号：US20060031650A1

公开(公告)日：2006-02-09

申请号：US11246190

申请日：2005-10-11

申请人： Hiroki Kanai ,  Shoji Kato ,  Yuusuke Yauchi

发明人： Hiroki Kanai ,  Shoji Kato ,  Yuusuke Yauchi

IPC分类号： G06F12/16 ,  G06F13/28

CPC分类号： G06F3/0605 ,  G06F3/061 ,  G06F3/0655 ,  G06F3/0658 ,  G06F3/0665 ,  G06F3/067 ,  G06F3/0689 ,  G06F11/2071 ,  G06F11/2074 ,  G06F13/28

摘要： In a storage system having a first storage control apparatus and a second storage control apparatus, the first storage control apparatus has: a first memory; a second memory; an input/output control unit for data transfer information in the second memory; and a data transfer control unit having a data buffer and a data transfer register for controlling data transfer between the first memory and second storage control apparatus based on the data transfer information read from the second memory and written in the data transfer register. When a second data transfer is controlled while a first data transfer is controlled, the data transfer control unit writes the first data transfer information and data stored in the data buffer into the second memory, reads the second data transfer information from the second memory and writes the second data transfer information into the data transfer register to control the second data transfer.

公开(公告)号：US06647461B2

公开(公告)日：2003-11-11

申请号：US10335899

申请日：2003-01-03

申请人： Kazuhisa Fujimoto ,  Hiroki Kanai ,  Akira Fujibayashi ,  Wataru Sakurai

发明人： Kazuhisa Fujimoto ,  Hiroki Kanai ,  Akira Fujibayashi ,  Wataru Sakurai

IPC分类号： G06F1202

CPC分类号： G06F3/0607 ,  G06F3/061 ,  G06F3/0613 ,  G06F3/0635 ,  G06F3/0658 ,  G06F3/067 ,  G06F3/0683 ,  G06F3/0689 ,  G06F12/0866

摘要： A disk array controller is made up of multiple disk array control units for implementing the data read/write operation and each having channel IF units, disk IF units, cache memory units and shared memory units. The disk array controller further includes inter connections for interconnecting the shared memory units and interconnecting the cache memory units across the border of disk array control units. Thereby alleviating the deterioration of performance due to the data transfer between the disk array control units, when the multiple disk array control units are to be operated as a single disk array controller.

公开(公告)号：US06629204B2

公开(公告)日：2003-09-30

申请号：US10294691

申请日：2002-11-15

申请人： Atsushi Tanaka ,  Akira Fujibayashi ,  Kazuhisa Fujimoto ,  Hiroki Kanai ,  Nobuyuki Minowa ,  Hikari Mikami ,  Makoto Asari

发明人： Atsushi Tanaka ,  Akira Fujibayashi ,  Kazuhisa Fujimoto ,  Hiroki Kanai ,  Nobuyuki Minowa ,  Hikari Mikami ,  Makoto Asari

IPC分类号： G06F1200

CPC分类号： G06F11/201 ,  G06F3/0611 ,  G06F3/0635 ,  G06F3/0658 ,  G06F3/0659 ,  G06F3/0689 ,  G06F11/2007 ,  G06F11/2089 ,  G06F11/2097

摘要： The disk array controller includes a plurality of interfaces with respective processors for connecting with a host computer or disk devices, duplicated shared memories connected in a one to one ratio between each interface and respective access paths, a selector connected to the plurality of interfaces, and a cache memory connected to the selector. The number of access paths between the selector and the plurality of interfaces is greater than the number of access paths between the cache memory and the selector. Each processor performs dual writing in the duplicated shared memories.

摘要翻译： 磁盘阵列控制器包括与各个处理器的多个接口，用于与主计算机或磁盘设备连接，在每个接口和相应的访问路径之间以一比一的比例连接的复制共享存储器，连接到多个接口的选择器，以及 连接到选择器的高速缓冲存储器。 选择器和多个接口之间的访问路径的数量大于高速缓冲存储器和选择器之间的访问路径的数量。 每个处理器在重复的共享存储器中执行双重写入。

公开(公告)号：US06470391B2

公开(公告)日：2002-10-22

申请号：US09850139

申请日：2001-05-08

申请人： Yoshifumi Takamoto ,  Hiroki Kanai ,  Tadahiro Takase ,  Katsuyoshi Kitai ,  Yoshimasa Masuoka

发明人： Yoshifumi Takamoto ,  Hiroki Kanai ,  Tadahiro Takase ,  Katsuyoshi Kitai ,  Yoshimasa Masuoka

IPC分类号： G06F1516

CPC分类号： H04L29/06 ,  H04L1/16 ,  H04L1/1809 ,  H04L1/1874 ,  H04L69/324

摘要： A communication controller at the sending computer divides data transferred from a host into sub-ACK unit packets, and transfers them sequentially to a destination without waiting for the sub-ACK's being subsequently provided by the destination. A communication controller at the receiving computer issues a sub-ACK to the sending computer for each of the sub-ACK unit packet, if the sub-ACK packet has been normally received and otherwise issues retransmission request for the sub-ACK unit packets and merges data included in the sub-ACK unit packets into the initial data, after they are normally received.

摘要翻译： 发送计算机上的通信控制器将从主机传送的数据分割为子ACK单元分组，并将它们顺序地传送到目的地，而不等待目的地随后提供的副ACK。 如果副ACK分组已被正常接收，则在接收计算机上的通信控制器向发送计算机发送子ACK，以便对于每个子ACK单元分组发送子ACK，并且另外发出用于子ACK单元分组的重发请求并合并 包含在子ACK单元中的数据在它们被正常接收之后被分组成初始数据。