公开(公告)号：US08045761B2

公开(公告)日：2011-10-25

申请号：US11444170

申请日：2006-05-30

申请人： Wael Badawy ,  Mohammed Shehata ,  Muzamil Shah Pervez ,  Jun Cai ,  Ahmad Radmanesh ,  Tyson Burr

发明人： Wael Badawy ,  Mohammed Shehata ,  Muzamil Shah Pervez ,  Jun Cai ,  Ahmad Radmanesh ,  Tyson Burr

IPC分类号： G06K9/00 ,  G06K9/40 ,  G06K9/32 ,  H04N7/18

CPC分类号： G06K9/00711 ,  G06T7/254 ,  G06T7/90 ,  G06T2207/30236

摘要： A method for determining the presence and location of static shadows and other ambient conditions (such as glare, snow, rain, etc.) in a series of time-successive images is provided. Each image comprises a series of image elements locatable on a plane, with each element being associated with a color defined by three chromatic elements. Furthermore, each image is partitioned into a set of elements, with each element comprising one or more pixels. According to the process of the present method, the ambient conditions are detected using a mixture of processes which utilize the chromatic elements, luminance qualities and temporal characteristics of the series of images.

摘要翻译： 提供了一系列时间连续的图像中确定静态阴影和其他环境条件（如眩光，雪，雨等）的存在和位置的方法。 每个图像包括可定位在平面上的一系列图像元素，每个元素与由三个彩色元素定义的颜色相关联。 此外，每个图像被分割成一组元素，其中每个元素包括一个或多个像素。 根据本方法的处理，使用利用彩色元素，亮度质量和一系列图像的时间特性的处理的混合来检测环境条件。

公开(公告)号：US07991020B2

公开(公告)日：2011-08-02

申请号：US11396334

申请日：2006-03-31

申请人： Hing (Thomas) Yan To ,  Jun Cai ,  Matt Dayley

发明人： Hing (Thomas) Yan To ,  Jun Cai ,  Matt Dayley

IPC分类号： H04J3/02 ,  H04B1/38 ,  H03K5/159

CPC分类号： H04B3/04 ,  H04L25/03343 ,  H04L2025/03356

摘要： An integrated circuit includes current mode drivers that provide equalized outputs. A parallel-to-serial converter circuit receives data at less than one fourth the output data rate, and provides main data and equalization data at one fourth the output data rate to at least one four-to-one multiplexer. The main data and equalization data is multiplexed onto an output node at the output data rate.

摘要翻译： 集成电路包括提供均衡输出的电流模式驱动器。 并行到串行转换器电路以小于输出数据速率的四分之一接收数据，并将输出数据速率的四分之一的主数据和均衡数据提供给至少一个四对一多路复用器。 主数据和均衡数据以输出数据速率复用到输出节点上。

公开(公告)号：US20110042717A1

公开(公告)日：2011-02-24

申请号：US12917648

申请日：2010-11-02

申请人： Jun Cai

发明人： Jun Cai

IPC分类号： H01L27/06 ,  H01L21/8249

CPC分类号： H01L29/861

摘要： An integrated low leakage diode suitable for operation in a power integrated circuit has a structure similar to a lateral power MOSFET, but with the current flowing through the diode in the opposite direction to a conventional power MOSFET. The anode is connected to the gate and the comparable MOSFET source region which has highly doped regions of both conductivity types connected to the channel region to thereby create a lateral bipolar transistor having its base in the channel region. A second lateral bipolar transistor is formed in the cathode region. As a result, substantially all of the diode current flows at the upper surface of the diode thereby minimizing the substrate leakage current. A deep highly doped region in contact with the layers forming the emitter and the base of the vertical parasitic bipolar transistor inhibits the ability of the vertical parasitic transistor to fully turn on.

摘要翻译： 适合在功率集成电路中工作的集成式低漏极二极管具有类似于横向功率MOSFET的结构，但是电流以与常规功率MOSFET相反的方式流过二极管。 阳极连接到栅极和可比较的MOSFET源极区域，其具有连接到沟道区域的两种导电类型的高掺杂区域，从而产生在沟道区域中具有其基极的横向双极晶体管。 在阴极区域形成第二横向双极晶体管。 结果，基本上所有的二极管电流在二极管的上表面流动，从而使衬底漏电流最小化。 与形成垂直寄生双极晶体管的发射极和基极的层接触的深度高掺杂区域抑制垂直寄生晶体管完全导通的能力。

公开(公告)号：US20100324720A1

公开(公告)日：2010-12-23

申请号：US12796899

申请日：2010-06-09

申请人： Yimin ZHAN ,  Renwei Yuan ,  Garth M. Nelson ,  Yuanfeng Luo ,  Jun Cai ,  Ugo Cantelli

发明人： Yimin ZHAN ,  Renwei Yuan ,  Garth M. Nelson ,  Yuanfeng Luo ,  Jun Cai ,  Ugo Cantelli

IPC分类号： G05B19/402 ,  G05B19/048

CPC分类号： G05B19/414 ,  B23H7/20 ,  B23H9/10 ,  G05B2219/34273 ,  G05B2219/45221 ,  G05B2219/49329

摘要： An electroerosion control system includes a general CNC controller being configured for controlling a general CNC machine process, a power supply for energizing a tool electrode and a workpiece to be machined, an electroerosion controller electrically connecting with the power supply for controlling an output of the power supply, and adaptively and electrically connecting with the general CNC controller for communication thereof, and a sensor sensing real-time status information of a working gap between the tool electrode and the workpiece and for sending said real-time status information to said electroerosion controller. Said electroerosion controller automatically controls the electroerosion machining process through the general CNC controller according to the real-time status information of the working gap.

摘要翻译： 电腐蚀控制系统包括通用CNC控制器，其被配置用于控制一般的CNC机器处理，用于激励工具电极和待加工的工件的电源，与电源电连接以控制功率输出的电腐蚀控制器 供给，并且与通用CNC控制器自适应地电连接以进行通信;以及传感器，其感测工具电极和工件之间的工作间隙的实时状态信息，并将所述实时状态信息发送到所述电极控制器。 所述电腐蚀控制器根据工作间隙的实时状态信息，通过一般CNC控制器自动控制电腐蚀加工过程。

公开(公告)号：US20100320078A1

公开(公告)日：2010-12-23

申请号：US12797136

申请日：2010-06-09

申请人： Renwei Yuan ,  Garth M. Nelson ,  Yuanfeng Luo ,  Roberto Ciappi ,  Jun Cai ,  Yimin Zhan ,  Ugo Cantelli ,  Massimo Arcioni

发明人： Renwei Yuan ,  Garth M. Nelson ,  Yuanfeng Luo ,  Roberto Ciappi ,  Jun Cai ,  Yimin Zhan ,  Ugo Cantelli ,  Massimo Arcioni

IPC分类号： C25D17/10

CPC分类号： B23H7/26 ,  B23H1/00 ,  B23H7/30 ,  B23H2400/10

摘要： An electroerosion spindle assembly includes a main shaft, a tool electrode having a rear end directly or indirectly attached to the shaft and in alignment with the main shaft in a longitudinal direction, a container surrounding the main shaft, a stationary-to-rotary electrical conduction device mounted on the container for transitting power energy to the tool electrode, and a channel routing a flushing fluid to a front end of the tool electrode. The channel has at least one flushing slot in the container.

摘要翻译： 一种电动滚丝轴组件包括主轴，工具电极，其后端直接或间接地附接到轴并且沿着纵向方向与主轴对准，围绕主轴的容器，静止到旋转的导电 安装在容器上以将功率能量转移到工具电极的装置，以及将冲洗流体路由到工具电极的前端的通道。 通道在容器中至少有一个冲洗槽。

公开(公告)号：US07842968B2

公开(公告)日：2010-11-30

申请号：US11971596

申请日：2008-01-09

申请人： Jun Cai

发明人： Jun Cai

IPC分类号： H01L29/43

CPC分类号： H01L29/861

摘要： An integrated low leakage diode suitable for operation in a power integrated circuit has a structure similar to a lateral power MOSFET, but with the current flowing through the diode in the opposite direction to a conventional power MOSFET. The anode is connected to the gate and the comparable MOSFET source region which has highly doped regions of both conductivity types connected to the channel region to thereby create a lateral bipolar transistor having its base in the channel region. A second lateral bipolar transistor is formed in the cathode region. As a result, substantially all of the diode current flows at the upper surface of the diode thereby minimizing the substrate leakage current. A deep highly doped region in contact with the layers forming the emitter and the base of the vertical parasitic bipolar transistor inhibits the ability of the vertical parasitic transistor to fully turn on.

摘要翻译： 适合在功率集成电路中工作的集成式低漏极二极管具有类似于横向功率MOSFET的结构，但是电流以与常规功率MOSFET相反的方式流过二极管。 阳极连接到栅极和可比较的MOSFET源极区域，其具有连接到沟道区域的两种导电类型的高掺杂区域，从而产生在沟道区域中具有其基极的横向双极晶体管。 在阴极区域形成第二横向双极晶体管。 结果，基本上所有的二极管电流在二极管的上表面流动，从而使衬底漏电流最小化。 与形成垂直寄生双极晶体管的发射极和基极的层接触的深度高掺杂区域抑制垂直寄生晶体管完全导通的能力。

公开(公告)号：US20100193878A1

公开(公告)日：2010-08-05

申请号：US12365228

申请日：2009-02-04

申请人： Jun Cai

发明人： Jun Cai

IPC分类号： H01L27/088 ,  H01L29/06 ,  H01L21/8236

CPC分类号： H01L21/823878 ,  H01L21/823807 ,  H01L21/823814 ,  H01L21/823892 ,  H01L27/0922 ,  H01L29/0847 ,  H01L29/1045 ,  H01L29/1083 ,  H01L29/1087 ,  H01L29/456 ,  H01L29/66659 ,  H01L29/7835

摘要： A semiconductor device 100 has N-well regions 18 holding PMOS devices 110, 112 and P-type regions 14 holding NMOS devices 114, 116. Devices 110 and 114 have high thresholds and devices 112 and 116 have low thresholds. The PMOS devices are junction isolated from the substrate 10 by the N-well 18 and the NMOS devices are isolated from the substrate by the N-type layer 13. Field oxide regions 20 laterally isolate the PMOS from the NMOS devices. The high threshold CMOS devices 110, 114 connect the low threshold CMOS devices to opposite rails Vdd and Vss. A control terminal 121 turns the high threshold devices on to let the low threshold devices switch rapidly. In stand-by mode, the high threshold devices are off and there is very low leakage current.

摘要翻译： 半导体器件100具有保持PMOS器件110,112的N阱区域18和保持NMOS器件114,116的P型区域14.器件110和114具有高阈值，器件112和116具有低阈值。 PMOS器件通过N阱18与衬底10隔离，并且NMOS器件通过N型层13与衬底隔离。场氧化物区域20将NMOS与NMOS器件横向隔离。 高阈值CMOS器件110,114将低阈值CMOS器件连接到相对的引脚Vdd和Vss。 控制终端121打开高阈值装置以使低阈值装置快速切换。 在待机模式下，高阈值器件关闭，漏电流非常低。

公开(公告)号：US07745845B2

公开(公告)日：2010-06-29

申请号：US12107995

申请日：2008-04-23

申请人： Jun Cai

发明人： Jun Cai

IPC分类号： H01L29/74

CPC分类号： H01L29/861 ,  H01L29/0626 ,  H01L29/10 ,  H01L29/402 ,  H01L29/47 ,  H01L29/66143 ,  H01L29/872

摘要： An integrated low leakage Schottky diode has a Schottky barrier junction proximate one side of an MOS gate with one end of a drift region on an opposite side of the gate. Below the Schottky metal and the gate oxide is a RESURF structure of an N− layer over a P− layer which also forms the drift region that ends at the diode's cathode in one embodiment of the present invention. The N− and P− layers have an upward concave shape under the gate. The gate electrode and the Schottky metal are connected to the diode's anode. A P− layer lies between the RESURF structure and an NISO region which has an electrical connection to the anode. A P+ layer under the Schottky metal is in contact with the P− layer through a P well.

摘要翻译： 集成的低泄漏肖特基二极管在MOS栅极的一侧具有肖特基势垒结，其栅极的相对侧上具有漂移区的一端。 在肖特基金属之下和栅极氧化物是在本发明的一个实施方案中，P-层上的N层的RESURF结构，其也形成在二极管阴极处结束的漂移区。 N和P-层在栅极下方具有向上的凹形。 栅电极和肖特基金属连接到二极管的阳极。 P层位于RESURF结构和与阳极电连接的NISO区域之间。 肖特基金属下的P +层通过P阱与P-层接触。

公开(公告)号：US07686895B2

公开(公告)日：2010-03-30

申请号：US11701145

申请日：2007-01-31

申请人： Ashwin A. Hattiangadi ,  Adrian Vasile Catalina ,  Leo Chuzhoy ,  Jun Cai

发明人： Ashwin A. Hattiangadi ,  Adrian Vasile Catalina ,  Leo Chuzhoy ,  Jun Cai

IPC分类号： C21D5/02 ,  C21D1/04

CPC分类号： C21D1/04 ,  C21D5/00

摘要： A method of forming gray iron components includes applying a substantially uniform magnetic field to gray iron. The method also includes heat-treating the gray iron while the gray iron is within the magnetic field.

摘要翻译： 形成灰铁组分的方法包括对灰铁施加基本均匀的磁场。 该方法还包括对灰铁进行热处理，而灰铁在磁场内。

公开(公告)号：US07678656B2

公开(公告)日：2010-03-16

申请号：US11669233

申请日：2007-01-31

申请人： Jun Cai ,  Michael Harley-Stead ,  Jim G. Holt

发明人： Jun Cai ,  Michael Harley-Stead ,  Jim G. Holt

IPC分类号： H01L21/336

CPC分类号： H01L29/7835 ,  H01L29/0847 ,  H01L29/1045 ,  H01L29/456 ,  H01L29/4933 ,  H01L29/665 ,  H01L29/66659

摘要： An HV PMOS device formed on a substrate having an HV well of a first polarity type formed in an epitaxial layer of a second polarity type includes a pair of field oxide regions on the substrate and at least partially over the HV well. Insulated gates are formed on the substrate between the field oxide regions. Stacked hetero-doping rims are formed in the HV well and in self-alignment with outer edges of the gates. A buffer region of the first polarity type is formed in the HV well between and in self-alignment with inner edges of the gates. A drift region of the second polarity type is formed in the buffer region between and in self-alignment with inner edges of the gates. The drift region includes a region having a gradual dopant concentration change, and includes a drain region of the second polarity type.

摘要翻译： 形成在具有形成在第二极性类型的外延层中的具有第一极性类型的HV阱的衬底上的HV PMOS器件包括在衬底上并且至少部分地在HV阱上的一对场氧化物区域。 绝缘栅极形成在场氧化物区域之间的衬底上。 堆叠的异质掺杂衬垫形成在HV阱中并与栅极的外边缘自对准。 第一极性类型的缓冲区形成在HV阱中，并且与栅极的内边缘自对准。 第二极性类型的漂移区域形成在缓冲区域中，并且与栅极的内边缘自对准。 漂移区域包括具有逐渐掺杂浓度变化的区域，并且包括第二极性类型的漏极区域。