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公开(公告)号：US20110187565A1
公开(公告)日：2011-08-04
申请号：US12699592
申请日：2010-02-03
申请人： Ashish Jagmohan , Demijan Klinc
发明人： Ashish Jagmohan , Demijan Klinc
CPC分类号： H03M7/30 , H03M13/1102 , H03M13/1111 , H03M13/6362
摘要： A method, system and computer program product are disclosed for rateless compression of non-binary sources. In one embodiment, the method comprises representing a sequence of non-binary source symbols as a sequence of sets of binary values; selecting a code for compressing the sets of binary values; determining a puncturing pattern, based on the selected code; and puncturing the sets of binary values, in patterns based on the puncturing pattern, to form a sequence of unpunctured values. A sequence of computed syndromes is determined based on the sequence of non-binary source symbols; and the sequence of unpunctured values and the sequence of computed syndromes are combined to form an output stream of data representing said sequence of non-binary source symbols. In one embodiment, none of the sets of binary values is punctured completely, and, for example, each of the sets of binary values may be punctured only partially.
摘要翻译： 公开了用于非二进制源的无压缩压缩的方法，系统和计算机程序产品。 在一个实施例中，该方法包括将非二进制源符号序列表示为二进制值集合的序列; 选择用于压缩二进制值集合的代码; 基于所选择的代码确定删截图案; 以及基于所述删截图案在模式中对所述二进制值集进行穿孔，以形成未穿刺值的序列。 基于非二进制源符号的序列确定计算的综合征序列; 并且将未穿刺值的序列和计算的综合征的序列组合以形成表示所述非二进制源符号序列的数据的输出流。 在一个实施例中，没有完全对穿透的二进制值集合进行穿孔，并且例如，可以仅部分地对穿孔的二进制值中的每一组进行穿孔。
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公开(公告)号：US07990290B1
公开(公告)日：2011-08-02
申请号：US12699592
申请日：2010-02-03
申请人： Ashish Jagmohan , Demijan Klinc
发明人： Ashish Jagmohan , Demijan Klinc
IPC分类号： H03M7/00
CPC分类号： H03M7/30 , H03M13/1102 , H03M13/1111 , H03M13/6362
摘要： A method, system and computer program product are disclosed for rateless compression of non-binary sources. In one embodiment, the method comprises representing a sequence of non-binary source symbols as a sequence of sets of binary values; selecting a code for compressing the sets of binary values; determining a puncturing pattern, based on the selected code; and puncturing the sets of binary values, in patterns based on the puncturing pattern, to form a sequence of unpunctured values. A sequence of computed syndromes is determined based on the sequence of non-binary source symbols; and the sequence of unpunctured values and the sequence of computed syndromes are combined to form an output stream of data representing said sequence of non-binary source symbols. In one embodiment, none of the sets of binary values is punctured completely, and, for example, each of the sets of binary values may be punctured only partially.
摘要翻译： 公开了用于非二进制源的无压缩压缩的方法，系统和计算机程序产品。 在一个实施例中，该方法包括将非二进制源符号序列表示为二进制值集合的序列; 选择用于压缩二进制值集合的代码; 基于所选择的代码确定删截图案; 以及基于所述删截图案在模式中对所述二进制值集进行穿孔，以形成未穿刺值的序列。 基于非二进制源符号的序列确定计算的综合征序列; 并且将未穿刺值的序列和计算的综合征的序列组合以形成表示所述非二进制源符号序列的数据的输出流。 在一个实施例中，没有完全对穿透的二进制值集合进行穿孔，并且例如，可以仅部分地对穿孔的二进制值中的每一组进行穿孔。
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公开(公告)号：US20110138104A1
公开(公告)日：2011-06-09
申请号：US12631470
申请日：2009-12-04
CPC分类号： G06F12/0246 , G06F2212/401 , G11C11/5621 , G11C16/3418 , G11C16/349
摘要： Multi-write coding of non-volatile memories including a method that receives write data, and a write address of a memory page. The memory page is in either an erased state or a previously written state. If the memory page is in the erased state: selecting a first codeword from a code such that the first codeword encodes the write data and is consistent with a target set of distributions of electrical charge levels in the memory page; and writing the first codeword to the memory page. If the memory page is in the previously written state: selecting a coset from a linear code such that the coset encodes the write data and includes one or more words that are consistent with previously written content of the memory page; selecting a subsequent codeword from the one or more words in the coset; and writing the subsequent codeword to the memory page.
摘要翻译： 包括接收写入数据的方法的非易失性存储器的多写入编码以及存储器页面的写入地址。 存储器页面处于擦除状态或先前写入的状态。 如果存储器页面处于擦除状态：从代码中选择第一码字，使得第一码字对写入数据进行编码，并与存储器页面中的电荷电平分布的目标集合一致; 以及将所述第一码字写入所述存储器页。 如果存储器页面处于先前写入的状态：从线性代码选择陪集，使得陪集对编写数据进行编码并且包括与存储器页面的先前写入的内容一致的一个或多个单词; 从陪集中的一个或多个单词中选择随后的码字; 以及将所述后续码字写入所述存储器页面。
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74.发明授权Method and system for the error resilient transmission of predictively encoded signals 失效用于预测编码信号的错误传播的方法和系统公开(公告)号：US07433405B2
公开(公告)日：2008-10-07
申请号：US11932143
申请日：2007-10-31
摘要： A system for the introduction of controlled correlation among multiple redundant representations of predictively encoded signals while avoiding predictive mismatch at a receiver when any given sub-set of the multiple representations is received. The system embodies a signal encoder and decoder. The decoder can comprise at least two signal adders for respectively receiving coefficient values and adding at least one predictive value transform to the coefficient value in order to generate and transmit a second set of coefficient values. The second set of coefficient values is subsequently received by a decoder means, wherein the decoder means transforms the received coefficient values and transmits the resultant coefficient values to a signal adder. Upon reception of the transformed coefficient values, the signal adder generates a third set of coefficient values; the third set of coefficients being used to reconstruct an approximate version of an encoded signal.
摘要翻译： 一种用于在预测编码信号的多个冗余表示之间引入受控相关性的系统，同时在接收到多个表示的任何给定子集时避免接收机处的预测失配。 该系统体现了信号编码器和解码器。 解码器可以包括用于分别接收系数值的至少两个信号加法器，并且将至少一个预测值变换加到系数值，以便产生和发送第二组系数值。 第二组系数值随后由解码器装置接收，其中解码器装置变换接收到的系数值，并将所得到的系数值发送到信号加法器。 在接收到变换的系数值时，信号加法器产生第三组系数值; 第三组系数用于重建编码信号的近似版本。
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75.发明申请METHOD AND SYSTEM FOR THE ERROR RESILIENT TRANSMISSION OF PREDICTIVELY ENCODED SIGNALS 失效用于预测编码信号的错误响应传输的方法和系统公开(公告)号：US20080117964A1
公开(公告)日：2008-05-22
申请号：US11932143
申请日：2007-10-31
摘要： A system for the introduction of controlled correlation among multiple redundant representations of predictively encoded signals while avoiding predictive mismatch at a receiver when any given sub-set of the multiple representations is received. The system embodies a signal encoder and decoder. The decoder can comprise at least two signal adders for respectively receiving coefficient values and adding at least one predictive value transform to the coefficient value in order to generate and transmit a second set of coefficient values. The second set of coefficient values is subsequently received by a decoder means, wherein the decoder means transforms the received coefficient values and transmits the resultant coefficient values to a signal adder. Upon reception of the transformed coefficient values, the signal adder generates a third set of coefficient values; the third set of coefficients being used to reconstruct an approximate version of an encoded signal.
摘要翻译： 一种用于在预测编码信号的多个冗余表示之间引入受控相关性的系统，同时在接收到多个表示的任何给定子集时避免接收机处的预测失配。 该系统体现了信号编码器和解码器。 解码器可以包括用于分别接收系数值的至少两个信号加法器，并且将至少一个预测值变换加到系数值，以便产生和发送第二组系数值。 第二组系数值随后由解码器装置接收，其中解码器装置变换接收到的系数值，并将所得到的系数值发送到信号加法器。 在接收到变换的系数值时，信号加法器产生第三组系数值; 第三组系数用于重建编码信号的近似版本。
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公开(公告)号：US09846641B2
公开(公告)日：2017-12-19
申请号：US13525757
申请日：2012-06-18
CPC分类号： G06F12/0246 , G06F12/0292 , G06F2212/7201 , G06F2212/7211
摘要： Techniques are presented that include determining, for data to be written to a nonvolatile memory, a location in the nonvolatile memory to which the data should be written based at least on one or more wear metrics corresponding to the location. The one or more wear metrics are based on measurements of the location. The measurements estimate physical wear of the location. The techniques further include writing the data to the determined location in the nonvolatile memory. The techniques may be performed by methods, apparatus (e.g., a memory controller), and computer program products.
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公开(公告)号：US09740439B2
公开(公告)日：2017-08-22
申请号：US13336385
申请日：2011-12-23
CPC分类号： G06F3/0688 , G06F3/0601 , G06F3/061 , G06F3/0619 , G06F3/064 , G06F3/0652 , G06F12/0246 , G06F2212/7201 , G06F2212/7211
摘要： Solid-state storage management for a system that includes a main board and a solid-state storage board separate from the main board is provided. The solid-state storage board includes a solid-state memory device and solid-state storage devices. The system is configured to perform a method that includes a correspondence being established, by a software module located on the main board, between a first logical address and a first physical address on the solid-state storage devices. The correspondence between the first logical address and the first physical address is stored in a location on the solid-state memory device. The method also includes translating the first logical address into the first physical address. The translating is performed by an address translator module located on the solid-state storage board and is based on the previously established correspondence between the first logical address and the first physical address.
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公开(公告)号：US09058896B2
公开(公告)日：2015-06-16
申请号：US13598001
申请日：2012-08-29
申请人： Michele M. Franceschini , Hillery Hunter , Ashish Jagmohan , Charles A. Kilmer , Kyu-Hyoun Kim , Luis A. Lastras , Moinuddin K. Qureshi
发明人： Michele M. Franceschini , Hillery Hunter , Ashish Jagmohan , Charles A. Kilmer , Kyu-Hyoun Kim , Luis A. Lastras , Moinuddin K. Qureshi
IPC分类号： G11C7/00 , G11C11/406 , G11C29/50
CPC分类号： G11C11/40622 , G11C29/50016 , G11C2211/4065 , G11C2211/4068
摘要： A refresh of a DRAM having at least a fast and a slow refresh rate includes encoding a pointer on a row or rows with refresh information, reading the refresh information, and incrementing a fast refresh address counter with the refresh information. The refresh may be performed by encoding one or more cells on a row that may require a fast refresh, one or more cells on a group of rows that may require a fast refresh, or one or more cells on a row that may not require a fast refresh.
摘要翻译： 具有至少具有快速和慢刷新速率的DRAM的刷新包括用具有刷新信息的行或行编码指针，读取刷新信息，以及用刷新信息递增快速刷新地址计数器。 刷新可以通过对可能需要快速刷新的行上的一个或多个单元进行编码来执行，一组或多个单元可以需要快速刷新，或者一行上的一个或多个单元可以不需要 快速刷新
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公开(公告)号：US08990217B2
公开(公告)日：2015-03-24
申请号：US13181880
申请日：2011-07-13
CPC分类号： H03M7/3084 , G06F17/30613 , G06F2212/401
摘要： A method for receiving a data stream that includes data samples, each data sample having one of a plurality of actual values. For each data sample in the data stream, a first index in a dictionary is selected. The dictionary includes indices corresponding to each of the plurality of actual values. The first index corresponds to an actual value of the data sample. A predicted value of the data sample is generated in response to previously received data samples in the data stream and to a prediction algorithm. A second index in the dictionary that corresponds to an actual value in the dictionary that is closest to the value of the predicted value is selected. The difference between the first index and the second index is calculated and compressed. The compressed difference between the first index and the second index is then output. This process is performed for each data sample in the data stream.
摘要翻译： 一种用于接收包括数据样本的数据流的方法，每个数据样本具有多个实际值中的一个。 对于数据流中的每个数据样本，选择字典中的第一个索引。 字典包括与多个实际值中的每一个对应的索引。 第一个索引对应于数据样本的实际值。 响应于先前接收的数据流中的数据样本和预测算法产生数据样本的预测值。 选择字典中对应于字典中与预测值的值最接近的实际值的第二索引。 计算并压缩第一个索引和第二个索引之间的差异。 然后输出第一索引和第二索引之间的压缩差。 对数据流中的每个数据样本执行此过程。
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公开(公告)号：US08874846B2
公开(公告)日：2014-10-28
申请号：US13619451
申请日：2012-09-14
申请人： Michele M. Franceschini , Ashish Jagmohan , John P. Karidis , Luis A. Lastras-Montano , Moinuddin K. Qureshi
发明人： Michele M. Franceschini , Ashish Jagmohan , John P. Karidis , Luis A. Lastras-Montano , Moinuddin K. Qureshi
CPC分类号： G06F12/00 , G06F12/08 , G06F12/0802 , G06F12/0891
摘要： Memory cell presetting for improved performance including a method for using a computer system to identify a region in a memory. The region includes a plurality of memory cells characterized by a write performance characteristic that has a first expected value when a write operation changes a current state of the memory cells to a desired state of the memory cells and a second expected value when the write operation changes a specified state of the memory cells to the desired state of the memory cells. The second expected value is closer than the first expected value to a desired value of the write performance characteristic. The plurality of memory cells in the region are set to the specified state, and the data is written into the plurality of memory cells responsive to the setting.
摘要翻译： 用于改进性能的存储单元预设，包括使用计算机系统识别存储器中的区域的方法。 该区域包括多个存储单元，其特征在于当写入操作将存储单元的当前状态改变到存储单元的期望状态时具有第一期望值的写入性能特性，以及当写入操作改变时第二预期值 存储器单元的指定状态到存储器单元的期望状态。 第二期望值比第一期望值更接近写入性能特性的期望值。 区域中的多个存储单元被设置为指定状态，并且响应于该设置将数据写入多个存储单元。
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