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公开(公告)号:US20130339570A1
公开(公告)日:2013-12-19
申请号:US13525757
申请日:2012-06-18
IPC分类号: G06F12/02
CPC分类号: G06F12/0246 , G06F12/0292 , G06F2212/7201 , G06F2212/7211
摘要: Techniques are presented that include determining, for data to be written to a nonvolatile memory, a location in the nonvolatile memory to which the data should be written based at least on one or more wear metrics corresponding to the location. The one or more wear metrics are based on measurements of the location. The measurements estimate physical wear of the location. The techniques further include writing the data to the determined location in the nonvolatile memory. The techniques may be performed by methods, apparatus (e.g., a memory controller), and computer program products.
摘要翻译: 提出了技术,包括至少基于对应于该位置的一个或多个磨损度量,确定要写入非易失性存储器的数据的非易失性存储器中应该写入数据的位置。 一个或多个磨损指标基于位置的测量。 测量值估计位置的物理磨损。 这些技术还包括将数据写入非易失性存储器中确定的位置。 这些技术可以通过方法,装置(例如,存储器控制器)和计算机程序产品来执行。
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公开(公告)号:US20130339574A1
公开(公告)日:2013-12-19
申请号:US13554316
申请日:2012-07-20
IPC分类号: G06F12/00
CPC分类号: G06F12/0246 , G06F12/0292 , G06F2212/7201 , G06F2212/7211
摘要: Techniques are presented that include determining, for data to be written to a nonvolatile memory, a location in the nonvolatile memory to which the data should be written based at least on one or more wear metrics corresponding to the location. The one or more wear metrics are based on measurements of the location. The measurements estimate physical wear of the location. The techniques further include writing the data to the determined location in the nonvolatile memory. The techniques may be performed by methods, apparatus (e.g., a memory controller), and computer program products.
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公开(公告)号:US09846641B2
公开(公告)日:2017-12-19
申请号:US13525757
申请日:2012-06-18
CPC分类号: G06F12/0246 , G06F12/0292 , G06F2212/7201 , G06F2212/7211
摘要: Techniques are presented that include determining, for data to be written to a nonvolatile memory, a location in the nonvolatile memory to which the data should be written based at least on one or more wear metrics corresponding to the location. The one or more wear metrics are based on measurements of the location. The measurements estimate physical wear of the location. The techniques further include writing the data to the determined location in the nonvolatile memory. The techniques may be performed by methods, apparatus (e.g., a memory controller), and computer program products.
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公开(公告)号:US20120311262A1
公开(公告)日:2012-12-06
申请号:US13151043
申请日:2011-06-01
申请人: Michele M. Franceschini , Ashish Jagmohan , John P. Karidis , Luis A. Lastras-Montano , Moinuddin K. Qureshi
发明人: Michele M. Franceschini , Ashish Jagmohan , John P. Karidis , Luis A. Lastras-Montano , Moinuddin K. Qureshi
CPC分类号: G06F12/00 , G06F12/08 , G06F12/0802 , G06F12/0891
摘要: Memory cell presetting for improved performance including a system that includes a memory, a cache, and a memory controller. The memory includes memory lines made up of memory cells. The cache includes cache lines that correspond to a subset of the memory lines. The memory controller is in communication with the memory and the cache. The memory controller is configured to perform a method that includes scheduling a request to set memory cells of a memory line to a common specified state in response to a cache line attaining a dirty state.
摘要翻译: 用于改进性能的存储单元预置,包括包括存储器,高速缓存和存储器控制器的系统。 存储器包括由存储单元组成的存储器线。 缓存包括对应于存储器线的子集的高速缓存行。 存储器控制器与存储器和缓存器通信。 存储器控制器被配置为执行一种方法,该方法包括根据达到肮脏状态的高速缓存线来调度将存储器线的存储单元设置为公共指定状态的请求。
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公开(公告)号:US08848471B2
公开(公告)日:2014-09-30
申请号:US13569486
申请日:2012-08-08
申请人: Michele M. Franceschini , Hillery C. Hunter , Ashish Jagmohan , Charles A. Kilmer , Kyu-hyoun Kim , Luis A. Lastras , Moinuddin K. Qureshi
发明人: Michele M. Franceschini , Hillery C. Hunter , Ashish Jagmohan , Charles A. Kilmer , Kyu-hyoun Kim , Luis A. Lastras , Moinuddin K. Qureshi
CPC分类号: G11C29/50 , G11C11/406 , G11C29/023 , G11C29/028 , G11C29/50016
摘要: A method for determining an optimized refresh rate involves testing a refresh rate on rows of cells, determining an error rate of the rows, evaluating the error rate of the rows; and repeating these steps for a decreased refresh rate until the error rate is greater than a constraint, at which point a slow refresh rate is set.
摘要翻译: 用于确定优化的刷新速率的方法涉及测试单元行的刷新率,确定行的错误率,评估行的错误率; 并重复这些步骤以减少刷新率,直到错误率大于约束,此时设置较慢的刷新率。
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公开(公告)号:US20130013860A1
公开(公告)日:2013-01-10
申请号:US13619451
申请日:2012-09-14
申请人: Michele M. Franceschini , Ashish Jagmohan , John P. Karidis , Luis A. Lastras-Montano , Moinuddin K. Qureshi
发明人: Michele M. Franceschini , Ashish Jagmohan , John P. Karidis , Luis A. Lastras-Montano , Moinuddin K. Qureshi
CPC分类号: G06F12/00 , G06F12/08 , G06F12/0802 , G06F12/0891
摘要: Memory cell presetting for improved performance including a method for using a computer system to identify a region in a memory. The region includes a plurality of memory cells characterized by a write performance characteristic that has a first expected value when a write operation changes a current state of the memory cells to a desired state of the memory cells and a second expected value when the write operation changes a specified state of the memory cells to the desired state of the memory cells. The second expected value is closer than the first expected value to a desired value of the write performance characteristic. The plurality of memory cells in the region are set to the specified state, and the data is written into the plurality of memory cells responsive to the setting.
摘要翻译: 用于改进性能的存储单元预设,包括使用计算机系统识别存储器中的区域的方法。 该区域包括多个存储单元,其特征在于当写入操作将存储单元的当前状态改变到存储单元的期望状态时具有第一期望值的写入性能特性,以及当写入操作改变时第二预期值 存储器单元的指定状态到存储器单元的期望状态。 第二期望值比第一期望值更接近写入性能特性的期望值。 区域中的多个存储单元被设置为指定状态,并且响应于该设置将数据写入多个存储单元。
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公开(公告)号:US09058896B2
公开(公告)日:2015-06-16
申请号:US13598001
申请日:2012-08-29
申请人: Michele M. Franceschini , Hillery Hunter , Ashish Jagmohan , Charles A. Kilmer , Kyu-Hyoun Kim , Luis A. Lastras , Moinuddin K. Qureshi
发明人: Michele M. Franceschini , Hillery Hunter , Ashish Jagmohan , Charles A. Kilmer , Kyu-Hyoun Kim , Luis A. Lastras , Moinuddin K. Qureshi
IPC分类号: G11C7/00 , G11C11/406 , G11C29/50
CPC分类号: G11C11/40622 , G11C29/50016 , G11C2211/4065 , G11C2211/4068
摘要: A refresh of a DRAM having at least a fast and a slow refresh rate includes encoding a pointer on a row or rows with refresh information, reading the refresh information, and incrementing a fast refresh address counter with the refresh information. The refresh may be performed by encoding one or more cells on a row that may require a fast refresh, one or more cells on a group of rows that may require a fast refresh, or one or more cells on a row that may not require a fast refresh.
摘要翻译: 具有至少具有快速和慢刷新速率的DRAM的刷新包括用具有刷新信息的行或行编码指针,读取刷新信息,以及用刷新信息递增快速刷新地址计数器。 刷新可以通过对可能需要快速刷新的行上的一个或多个单元进行编码来执行,一组或多个单元可以需要快速刷新,或者一行上的一个或多个单元可以不需要 快速刷新
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公开(公告)号:US08874846B2
公开(公告)日:2014-10-28
申请号:US13619451
申请日:2012-09-14
申请人: Michele M. Franceschini , Ashish Jagmohan , John P. Karidis , Luis A. Lastras-Montano , Moinuddin K. Qureshi
发明人: Michele M. Franceschini , Ashish Jagmohan , John P. Karidis , Luis A. Lastras-Montano , Moinuddin K. Qureshi
CPC分类号: G06F12/00 , G06F12/08 , G06F12/0802 , G06F12/0891
摘要: Memory cell presetting for improved performance including a method for using a computer system to identify a region in a memory. The region includes a plurality of memory cells characterized by a write performance characteristic that has a first expected value when a write operation changes a current state of the memory cells to a desired state of the memory cells and a second expected value when the write operation changes a specified state of the memory cells to the desired state of the memory cells. The second expected value is closer than the first expected value to a desired value of the write performance characteristic. The plurality of memory cells in the region are set to the specified state, and the data is written into the plurality of memory cells responsive to the setting.
摘要翻译: 用于改进性能的存储单元预设,包括使用计算机系统识别存储器中的区域的方法。 该区域包括多个存储单元,其特征在于当写入操作将存储单元的当前状态改变到存储单元的期望状态时具有第一期望值的写入性能特性,以及当写入操作改变时第二预期值 存储器单元的指定状态到存储器单元的期望状态。 第二期望值比第一期望值更接近写入性能特性的期望值。 区域中的多个存储单元被设置为指定状态,并且响应于该设置将数据写入多个存储单元。
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公开(公告)号:US20140063997A1
公开(公告)日:2014-03-06
申请号:US13598001
申请日:2012-08-29
申请人: Michele M. Franceschini , Hillery Hunter , Ashish Jagmohan , Charles A. Kilmer , Kyu-Hyoun Kim , Luis A. Lastras , Moinuddin K. Qureshi
发明人: Michele M. Franceschini , Hillery Hunter , Ashish Jagmohan , Charles A. Kilmer , Kyu-Hyoun Kim , Luis A. Lastras , Moinuddin K. Qureshi
IPC分类号: G11C11/402 , G11C29/00
CPC分类号: G11C11/40622 , G11C29/50016 , G11C2211/4065 , G11C2211/4068
摘要: A refresh of a DRAM having at least a fast and a slow refresh rate includes encoding a pointer on a row or rows with refresh information, reading the refresh information, and incrementing a fast refresh address counter with the refresh information. The refresh may be performed by encoding one or more cells on a row that may require a fast refresh, one or more cells on a group of rows that may require a fast refresh, or one or more cells on a row that may not require a fast refresh.
摘要翻译: 具有至少具有快速和慢刷新速率的DRAM的刷新包括用具有刷新信息的行或行编码指针,读取刷新信息,以及用刷新信息递增快速刷新地址计数器。 刷新可以通过对可能需要快速刷新的行上的一个或多个单元进行编码来执行,一组或多个单元可以需要快速刷新,或者一行上的一个或多个单元可以不需要 快速刷新
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公开(公告)号:US20140043927A1
公开(公告)日:2014-02-13
申请号:US13569486
申请日:2012-08-08
申请人: Michele M. Franceschini , Hillery Hunter , Ashish Jagmohan , Charles A. Kilmer , Kyu-Hyoun Kim , Luis A. Lastras , Moinuddin K. Qureshi
发明人: Michele M. Franceschini , Hillery Hunter , Ashish Jagmohan , Charles A. Kilmer , Kyu-Hyoun Kim , Luis A. Lastras , Moinuddin K. Qureshi
CPC分类号: G11C29/50 , G11C11/406 , G11C29/023 , G11C29/028 , G11C29/50016
摘要: A method for determining an optimized refresh rate involves testing a refresh rate on rows of cells, determining an error rate of the rows, evaluating the error rate of the rows; and repeating these steps for a decreased refresh rate until the error rate is greater than a constraint, at which point a slow refresh rate is set.
摘要翻译: 用于确定优化的刷新速率的方法涉及测试单元行的刷新率,确定行的错误率,评估行的错误率; 并重复这些步骤以减少刷新率,直到错误率大于约束,此时设置较慢的刷新率。
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