Lossless compression of high nominal-range data

    公开(公告)号:US20130018889A1

    公开(公告)日:2013-01-17

    申请号:US13181880

    申请日:2011-07-13

    IPC分类号: G06F17/30

    摘要: A method for receiving a data stream that includes data samples, each data sample having one of a plurality of actual values. For each data sample in the data stream, a first index in a dictionary is selected. The dictionary includes indices corresponding to each of the plurality of actual values. The first index corresponds to an actual value of the data sample. A predicted value of the data sample is generated in response to previously received data samples in the data stream and to a prediction algorithm. A second index in the dictionary that corresponds to an actual value in the dictionary that is closest to the value of the predicted value is selected. The difference between the first index and the second index is calculated and compressed. The compressed difference between the first index and the second index is then output. This process is performed for each data sample in the data stream.

    Lossless compression of high nominal-range data
    2.
    发明授权
    Lossless compression of high nominal-range data 有权
    高标称范围数据的无损压缩

    公开(公告)号:US08990217B2

    公开(公告)日:2015-03-24

    申请号:US13181880

    申请日:2011-07-13

    IPC分类号: G06F17/30 H03M7/30

    摘要: A method for receiving a data stream that includes data samples, each data sample having one of a plurality of actual values. For each data sample in the data stream, a first index in a dictionary is selected. The dictionary includes indices corresponding to each of the plurality of actual values. The first index corresponds to an actual value of the data sample. A predicted value of the data sample is generated in response to previously received data samples in the data stream and to a prediction algorithm. A second index in the dictionary that corresponds to an actual value in the dictionary that is closest to the value of the predicted value is selected. The difference between the first index and the second index is calculated and compressed. The compressed difference between the first index and the second index is then output. This process is performed for each data sample in the data stream.

    摘要翻译: 一种用于接收包括数据样本的数据流的方法,每个数据样本具有多个实际值中的一个。 对于数据流中的每个数据样本,选择字典中的第一个索引。 字典包括与多个实际值中的每一个对应的索引。 第一个索引对应于数据样本的实际值。 响应于先前接收的数据流中的数据样本和预测算法产生数据样本的预测值。 选择字典中对应于字典中与预测值的值最接近的实际值的第二索引。 计算并压缩第一个索引和第二个索引之间的差异。 然后输出第一索引和第二索引之间的压缩差。 对数据流中的每个数据样本执行此过程。

    Subroutine return through branch history table
    4.
    发明授权
    Subroutine return through branch history table 失效
    子程序通过分支历史记录表返回

    公开(公告)号:US5276882A

    公开(公告)日:1994-01-04

    申请号:US558998

    申请日:1990-07-27

    IPC分类号: G06F9/38 G06F9/42

    摘要: Method and apparatus for correctly predicting an outcome of a branch instruction in a system of the type that includes a Branch History Table (BHT) and branch instructions that implement non-explicit subroutine calls and returns. Entries in the BHT have two additional stage fields including a CALL field to indicate that the branch entry corresponds to a branch that may implement a subroutine call and a PSEUDO field. The PSEUDO field represents linkage information and creates a link between a subroutine entry and a subroutine return. A target address of a successful branch instruction is used to search the BHT. The branch is known to be a subroutine return if a target quadword contains an entry prior to a target halfword that has the CALL field set. The entry with the CALL bit set is thus known to be the corresponding subroutine call, and the entry point to the subroutine is given by the target address stored within the entry. A PSEUDO entry is inserted into the BHT at the location corresponding to the entry point of the subroutine, the PSEUDO entry being designated as such by having the PSEUDO field asserted. The PSEUDO entry contains the address of the returning branch instruction in place of the target address field.

    摘要翻译: 用于正确预测包括分支历史表(BHT)的类型的系统中的分支指令的结果和实现非显式子程序调用和返回的分支指令的方法和装置。 BHT中的条目具有两个附加的阶段字段,包括CALL字段,以指示分支条目对应于可以实现子程序调用的分支和PSEUDO字段。 PSEUDO字段表示链接信息,并创建子程序条目和子程序返回之间的链接。 成功的分支指令的目标地址用于搜索BHT。 如果目标四字包含有设置了CALL字段的目标半字之前的条目,则该分支被称为子程序返回。 因此,具有CALL位置位的条目是相应的子程序调用,并且子程序的入口点由存储在条目中的目标地址给出。 将PSEUDO条目插入到与子程序的入口点相对应的位置处的BHT中,PSEUDO条目被指定为通过使PSEUDO字段被断言。 PSEUDO条目包含返回分支指令的地址,代替目标地址字段。

    Method for providing computing-environment control of a resource to be accessed by program code
    6.
    发明授权
    Method for providing computing-environment control of a resource to be accessed by program code 失效
    用于为程序代码访问的资源提供计算环境控制的方法

    公开(公告)号:US07584459B2

    公开(公告)日:2009-09-01

    申请号:US11035616

    申请日:2005-01-14

    IPC分类号: G06F9/45

    CPC分类号: G06F9/526

    摘要: A method of facilitating computing-environment control of a resource to be accessed by existing program code is provided which includes transparently replacing an uncontrolled resource referenced by existing program code with a resource controlled by a computing environment. The method also includes transparently interposing at least one resource management service of the computing environment between the existing program code and the resource controlled by the computing environment, wherein the at least one resource management service provides computing-environment control of the resource to be accessed by the existing program code. The replacing of the uncontrolled resource prevents the existing program code from directly accessing the resource.

    摘要翻译: 提供一种促进由现有程序代码访问的资源的计算环境控制的方法,其包括用计算环境控制的资源透明地替换由现有程序代码引用的不受控制的资源。 该方法还包括在现有程序代码和由计算环境控制的资源之间透明地插入计算环境的至少一个资源管理服务,其中至少一个资源管理服务提供对要访问的资源的计算环境控制 现有程序代码。 更换不受控制的资源会阻止现有程序代码直接访问资源。

    Cache remapping using synonym classes
    7.
    发明授权
    Cache remapping using synonym classes 失效
    使用同义词类进行缓存重映射

    公开(公告)号:US5584002A

    公开(公告)日:1996-12-10

    申请号:US21010

    申请日:1993-02-22

    IPC分类号: G06F12/08 G11C29/00 G06F11/20

    CPC分类号: G11C29/88 G06F12/0864

    摘要: A method for addressing data in a cache unit which has a plurality of congruence classes, following a failure which disables one or more of the congruence classes in the cache unit. A plurality of synonym classes are established. A subset of the congruence classes is assigned to each of the synonym classes. Any disabled congruence classes are identified. The synonym class to which the disabled congruence class belongs is identified. An alternate congruence class is selected which belongs to the same synonym class as the disabled congruence class. When a request is received by the cache to store a line of data into the disabled congruence class, the line is stored into the alternate congruence class in response to the request.

    摘要翻译: 一种用于在具有多个同余类的高速缓存单元中寻址数据的方法,该故障在禁用高速缓存单元中的一个或多个同余类之后。 建立了多个同义词类。 同余类的一个子集被分配给每个同义词类。 确定任何残疾同侪课程。 识别残疾同伴课所属的同义词类。 选择一个替代同余类,属于与残疾同余类相同的同义词类。 当高速缓存接收到请求以将一行数据存储到禁用的同余类中时,响应于请求将该行存储到备用同余类中。

    Cache miss facility with stored sequences for data fetching
    8.
    发明授权
    Cache miss facility with stored sequences for data fetching 失效
    高速缓存存储数据存储序列的设备

    公开(公告)号:US5233702A

    公开(公告)日:1993-08-03

    申请号:US390587

    申请日:1989-08-07

    IPC分类号: G06F12/08

    CPC分类号: G06F12/0862 G06F2212/6024

    摘要: A cache memory system develops an optimum sequence for transferring data values between a main memory and a line buffer internal to the cache. At the end of a line transfer, the data in the line buffer is written into the cache memory as a block. Following an initial cache miss, the cache memory system monitors the sequence of data requests received for data in the line that is being read in from main memory. If the sequence being used to read in the data causes the processor to wait for a specific data value in the line, a new sequence is generated in which the specific data value is read at an earlier time in the transfer cycle. This sequence is associated with the instruction that caused the first miss and is used for subsequent misses caused by the instruction. If, in the process of handling a first miss related to a specific instruction, a second miss occurs which is caused by the same instruction but which is for data in a different line of memory, the sequence associated with the instruction is marked as an ephemeral miss. Data transferred to the line buffer in response to an ephemeral miss is not stored in the cache memory and limited to that portion of the line accessed within the line buffer.

    Methods and apparatus for insulating a branch prediction mechanism from
data dependent branch table updates that result from variable test
operand locations
    9.
    发明授权
    Methods and apparatus for insulating a branch prediction mechanism from data dependent branch table updates that result from variable test operand locations 失效
    从数据依赖分支机构中分离出分支预测机制的方法和装置更新可变测试操作地点的更新

    公开(公告)号:US5210831A

    公开(公告)日:1993-05-11

    申请号:US429922

    申请日:1989-10-30

    IPC分类号: G06F9/38

    CPC分类号: G06F9/3844

    摘要: Methods and apparatus are described for processing branch instructions using a history based branch prediction mechanism (such as a branch history table) in combination with a data dependent branch table (DDBT), where the branch instructions can vary in both outcome and test operand location. The novel methods and apparatus are sensitive to branch mispredictions and to operand addresses used by the DDBT, to identify irrelevant DDBT entries. Irrelevant DDBT entries are identified within the prediction mechanism using state bits which, when set, indicate that: (1) a given entry in the prediction mechanism was updated by the DDBT and (2) subsequent to such update a misprediction occurred making further DDBT updates irrelevant. Once a DDBT entry is determined to be irrelevant, it is prevented from updating the prediction mechanism. The invention also provides methods and apparatus for locating and removing irrelevant entries from the DDBT. The update packet, sent by the DDBT to the history based prediction mechanism, is expanded to include the test operand address actually used by the DDBT. If the state bits indicate the update is irrelevant, then the operand address can be used to locate and delete the offending DDBT entry since the DDBT is organized based on operand addresses. Additionally, the invention provides for inhibiting creation of further DDBT entries when a Branch Wrong Guess event occurs subsequent to a DDBT update to a given prediction mechanism entry.