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公开(公告)号:US09953889B1
公开(公告)日:2018-04-24
申请号:US15281491
申请日:2016-09-30
申请人: PDF Solutions, Inc.
发明人: Stephen Lam , Dennis Ciplickas , Tomasz Brozek , Jeremy Cheng , Simone Comensoli , Indranil De , Kelvin Doong , Hans Eisenmann , Timothy Fiscus , Jonathan Haigh , Christopher Hess , John Kibarian , Sherry Lee , Marci Liao , Sheng-Che Lin , Hideki Matsuhashi , Kimon Michaels , Conor O'Sullivan , Markus Rauscher , Vyacheslav Rovner , Andrzej Strojwas , Marcin Strojwas , Carl Taylor , Rakesh Vallishayee , Larg Weiland , Nobuharu Yokoyama
CPC分类号: H01L22/26 , G01R31/2884 , G06F11/079 , G06F17/5045 , G06F17/5068 , G06F17/5072 , G06F17/5081 , H01L22/20 , H01L22/34 , H01L23/5226 , H01L23/528 , H01L27/0207 , H01L27/11803 , H01L27/11807 , H01L29/0649 , H01L29/0684 , H01L29/41725 , H01L29/45 , H01L2027/11866 , H01L2027/11875 , H01L2027/11885 , H01L2027/11887
摘要: Improved processes for manufacturing semiconductor wafers, chips, or dies utilize in-line data obtained from non-contact electrical measurements (“NCEM”) of fill cells that contain structures configured to target/expose a variety of open-circuit, short-circuit, leakage, and/or excessive resistance failure modes. Such processes include evaluating one or more Designs of Experiments (“DOEs”), each comprised of multiple NCEM-enabled fill cells, in at least two variants, targeted to the same failure mode. Such DOEs include multiple means/steps for enabling non-contact (NC) detection of GATECNT-GATE via opens.
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公开(公告)号:US09947601B1
公开(公告)日:2018-04-17
申请号:US15719513
申请日:2017-09-28
申请人: PDF Solutions, Inc.
发明人: Stephen Lam , Dennis Ciplickas , Tomasz Brozek , Jeremy Cheng , Simone Comensoli , Indranil De , Kelvin Doong , Hans Eisenmann , Timothy Fiscus , Jonathan Haigh , Christopher Hess , John Kibarian , Sherry Lee , Marci Liao , Sheng-Che Lin , Hideki Matsuhashi , Kimon Michaels , Conor O'Sullivan , Markus Rauscher , Vyacheslav Rovner , Andrzej Strojwas , Marcin Strojwas , Carl Taylor , Rakesh Vallishayee , Larg Weiland , Nobuharu Yokoyama
IPC分类号: H01L29/00 , H01L21/66 , H01L27/118 , H01L29/417 , H01L27/02 , H01L23/528 , G06F11/07 , G06F17/50 , H01L29/06
CPC分类号: H01L22/20 , G01R31/303 , G06F11/079 , G06F17/5045 , G06F17/5068 , G06F17/5072 , G06F17/5081 , G06F2217/06 , H01L21/823437 , H01L21/823475 , H01L22/26 , H01L22/32 , H01L22/34 , H01L23/5226 , H01L23/528 , H01L27/0207 , H01L27/088 , H01L27/11803 , H01L27/11807 , H01L28/00 , H01L29/0649 , H01L29/0684 , H01L29/0847 , H01L29/41725 , H01L29/45 , H01L2027/11866 , H01L2027/11875 , H01L2027/11888
摘要: An integrated circuit, in the form of a wafer, die, or chip, includes multiple standard cell-compatible fill cells, configured to enable non-contact electrical measurements. Such fill cells include mesh pads that contain at least three conductive stripes disposed between adjacent gate stripes. Such fill cells further include geometry to enable non-contact evaluation of side-to-side shorts and/or leakages.
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公开(公告)号:US09911670B1
公开(公告)日:2018-03-06
申请号:US15721789
申请日:2017-09-30
申请人: PDF Solutions, Inc.
发明人: Stephen Lam , Dennis Ciplickas , Tomasz Brozek , Jeremy Cheng , Simone Comensoli , Indranil De , Kelvin Doong , Hans Eisenmann , Timothy Fiscus , Jonathan Haigh , Christopher Hess , John Kibarian , Sherry Lee , Marci Liao , Sheng-Che Lin , Hideki Matsuhashi , Kimon Michaels , Conor O'Sullivan , Markus Rauscher , Vyacheslav Rovner , Andrzej Strojwas , Marcin Strojwas , Carl Taylor , Rakesh Vallishayee , Larg Weiland , Nobuharu Yokoyama
IPC分类号: H01L21/66 , H01L27/118 , H01L29/417 , H01L27/02 , H01L23/528 , G06F11/07 , G06F17/50 , H01L29/06
CPC分类号: H01L22/20 , G01R31/303 , G06F11/079 , G06F17/5045 , G06F17/5068 , G06F17/5072 , G06F17/5081 , G06F2217/06 , H01L21/823437 , H01L21/823475 , H01L22/26 , H01L22/32 , H01L22/34 , H01L23/5226 , H01L23/528 , H01L27/0207 , H01L27/088 , H01L27/11803 , H01L27/11807 , H01L28/00 , H01L29/0649 , H01L29/0684 , H01L29/0847 , H01L29/41725 , H01L29/45 , H01L2027/11866 , H01L2027/11875 , H01L2027/11888
摘要: An integrated circuit, in the form of a wafer, die, or chip, includes multiple standard cell-compatible fill cells, configured to enable non-contact electrical measurements. Such fill cells include mesh pads that contain at least three conductive stripes disposed between adjacent gate stripes. Such fill cells further include geometry to enable non-contact evaluation of via opens and/or resistances.
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公开(公告)号:US09911649B1
公开(公告)日:2018-03-06
申请号:US15259309
申请日:2016-09-08
申请人: PDF Solutions, Inc.
发明人: Stephen Lam , Dennis Ciplickas , Tomasz Brozek , Jeremy Cheng , Simone Comensoli , Indranil De , Kelvin Doong , Hans Eisenmann , Timothy Fiscus , Jonathan Haigh , Christopher Hess , John Kibarian , Sherry Lee , Marci Liao , Sheng-Che Lin , Hideki Matsuhashi , Kimon Michaels , Conor O'Sullivan , Markus Rauscher , Vyacheslav Rovner , Andrzej Strojwas , Marcin Strojwas , Carl Taylor , Rakesh Vallishayee , Larg Weiland , Nobuharu Yokoyama
IPC分类号: H01L21/66 , H01L23/58 , H01L21/768 , H01L21/3213
CPC分类号: H01L21/76895 , G01N23/2251 , G01R31/2644 , H01L21/32139 , H01L22/12 , H01L22/20 , H01L22/30 , H01L22/32 , H01L27/0207
摘要: Wafers, chips, or dies that contain fill cells with structures configured to obtain in-line data via non-contact electrical measurements (“NCEM”). Such NCEM-enabled fill cells may target/expose a variety of open-circuit, short-circuit, leakage, or excessive resistance failure modes, and may include NCEM pads that comprise a mesh of GATECNT and AACNT stripes. Such wafers, chips, or dies may include Designs of Experiments (“DOEs”), comprised of multiple NCEM-enabled fill cells, in at least two variants, all targeted to the same failure mode(s).
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公开(公告)号:US09881843B1
公开(公告)日:2018-01-30
申请号:US15719577
申请日:2017-09-29
申请人: PDF Solutions, Inc.
发明人: Stephen Lam , Dennis Ciplickas , Tomasz Brozek , Jeremy Cheng , Simone Comensoli , Indranil De , Kelvin Doong , Hans Eisenmann , Timothy Fiscus , Jonathan Haigh , Christopher Hess , John Kibarian , Sherry Lee , Marci Liao , Sheng-Che Lin , Hideki Matsuhashi , Kimon Michaels , Conor O'Sullivan , Markus Rauscher , Vyacheslav Rovner , Andrzej Strojwas , Marcin Strojwas , Carl Taylor , Rakesh Vallishayee , Larg Weiland , Nobuharu Yokoyama
IPC分类号: H01L29/00 , H01L21/66 , H01L27/118 , H01L29/417 , H01L27/02 , H01L23/528 , G06F11/07 , G06F17/50 , H01L29/06
CPC分类号: H01L22/20 , G01R31/303 , G06F11/079 , G06F17/5045 , G06F17/5068 , G06F17/5072 , G06F17/5081 , G06F2217/06 , H01L21/823437 , H01L21/823475 , H01L22/26 , H01L22/32 , H01L22/34 , H01L23/5226 , H01L23/528 , H01L27/0207 , H01L27/088 , H01L27/11803 , H01L27/11807 , H01L28/00 , H01L29/0649 , H01L29/0684 , H01L29/0847 , H01L29/41725 , H01L29/45 , H01L2027/11866 , H01L2027/11875 , H01L2027/11888
摘要: An integrated circuit, in the form of a wafer, die, or chip, includes multiple standard cell-compatible fill cells, configured to enable non-contact electrical measurements. Such fill cells include mesh pads that contain at least three conductive stripes disposed between adjacent gate stripes. Such fill cells further include geometry to enable non-contact evaluation of tip-to-tip shorts and/or leakages.
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公开(公告)号:US09870962B1
公开(公告)日:2018-01-16
申请号:US15719615
申请日:2017-09-29
申请人: PDF Solutions, Inc.
发明人: Stephen Lam , Dennis Ciplickas , Tomasz Brozek , Jeremy Cheng , Simone Comensoli , Indranil De , Kelvin Doong , Hans Eisenmann , Timothy Fiscus , Jonathan Haigh , Christopher Hess , John Kibarian , Sherry Lee , Marci Liao , Sheng-Che Lin , Hideki Matsuhashi , Kimon Michaels , Conor O'Sullivan , Markus Rauscher , Vyacheslav Rovner , Andrzej Strojwas , Marcin Strojwas , Carl Taylor , Rakesh Vallishayee , Larg Weiland , Nobuharu Yokoyama
IPC分类号: H01L23/528 , H01L21/66 , H01L27/118 , H01L29/417 , H01L27/02 , G06F11/07 , G06F17/50 , H01L29/06
CPC分类号: H01L22/20 , G01R31/303 , G06F11/079 , G06F17/5045 , G06F17/5068 , G06F17/5072 , G06F17/5081 , G06F2217/06 , H01L21/823437 , H01L21/823475 , H01L22/26 , H01L22/32 , H01L22/34 , H01L23/5226 , H01L23/528 , H01L27/0207 , H01L27/088 , H01L27/11803 , H01L27/11807 , H01L28/00 , H01L29/0649 , H01L29/0684 , H01L29/0847 , H01L29/41725 , H01L29/45 , H01L2027/11866 , H01L2027/11875 , H01L2027/11888
摘要: An integrated circuit, in the form of a wafer, die, or chip, includes multiple standard cell-compatible fill cells, configured to enable non-contact electrical measurements. Such fill cells include mesh pads that contain at least three conductive stripes disposed between adjacent gate stripes. Such fill cells further include geometry to enable non-contact evaluation of interlayer overlap shorts and/or leakages.
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公开(公告)号:US09831141B1
公开(公告)日:2017-11-28
申请号:US15188027
申请日:2016-06-21
申请人: PDF Solutions, Inc.
发明人: Stephen Lam , Dennis Ciplickas , Tomasz Brozek , Jeremy Cheng , Simone Comensoli , Indranil De , Kelvin Doong , Hans Eisenmann , Timothy Fiscus , Jonathan Haigh , Christopher Hess , John Kibarian , Sherry Lee , Marci Liao , Sheng-Che Lin , Hideki Matsuhashi , Kimon Michaels , Conor O'Sullivan , Markus Rauscher , Vyacheslav Rovner , Andrzej Strojwas , Marcin Strojwas , Carl Taylor , Rakesh Vallishayee , Larg Weiland , Nobuharu Yokoyama
IPC分类号: G01R27/20 , H01L21/66 , H01L27/02 , H01L27/118
CPC分类号: H01L22/26 , G01R31/2884 , G06F11/079 , G06F17/5045 , G06F17/5068 , G06F17/5072 , G06F17/5081 , H01L22/20 , H01L22/34 , H01L23/5226 , H01L23/528 , H01L27/0207 , H01L27/11803 , H01L27/11807 , H01L29/0649 , H01L29/0684 , H01L29/41725 , H01L29/45 , H01L2027/11866 , H01L2027/11875 , H01L2027/11885 , H01L2027/11887
摘要: Wafers, chips, or dies that contain fill cells with structures configured to obtain in-line data via non-contact electrical measurements (“NCEM”). Such NCEM-enabled fill cells may target/expose a variety of open-circuit, short-circuit, leakage, or excessive resistance failure modes, including GATE-snake-open and/or GATE-snake-resistance failure modes. Such wafers, chips, or dies may include Designs of Experiments (“DOEs”), comprised of multiple NCEM-enabled fill cells, in at least two variants, all targeted to the same failure mode.
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公开(公告)号:US09805994B1
公开(公告)日:2017-10-31
申请号:US15090274
申请日:2016-04-04
申请人: PDF Solutions, Inc.
发明人: Stephen Lam , Dennis Ciplickas , Tomasz Brozek , Jeremy Cheng , Simone Comensoli , Indranil De , Kelvin Doong , Hans Eisenmann , Timothy Fiscus , Jonathan Haigh , Christopher Hess , John Kibarian , Sherry Lee , Marci Liao , Sheng-Che Lin , Hideki Matsuhashi , Kimon Michaels , Conor O'Sullivan , Markus Rauscher , Vyacheslav Rovner , Andrzej Strojwas , Marcin Strojwas , Carl Taylor , Rakesh Vallishayee , Larg Weiland , Nobuharu Yokoyama
CPC分类号: H01L21/76895 , G01N23/2251 , G01R31/2644 , H01L21/32139 , H01L22/12 , H01L22/20 , H01L22/30 , H01L22/32 , H01L27/0207
摘要: Wafers, chips, or dies that contain fill cells with structures configured to obtain in-line data via non-contact electrical measurements (“NCEM”). Such NCEM-enabled fill cells may target/expose a variety of open-circuit, short-circuit, leakage, or excessive resistance failure modes, and may include NCEM pads that comprise a mesh of GATECNT and AACNT stripes. Such wafers, chips, or dies may include Designs of Experiments (“DOEs”), comprised of multiple NCEM-enabled fill cells, in at least two variants, all targeted to the same failure mode(s).
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公开(公告)号:US09799640B1
公开(公告)日:2017-10-24
申请号:US15473651
申请日:2017-03-30
申请人: PDF Solutions, Inc.
发明人: Stephen Lam , Dennis Ciplickas , Tomasz Brozek , Jeremy Cheng , Simone Comensoli , Indranil De , Kelvin Doong , Hans Eisenmann , Timothy Fiscus , Jonathan Haigh , Christopher Hess , John Kibarian , Sherry Lee , Marci Liao , Sheng-Che Lin , Hideki Matsuhashi , Kimon Michaels , Conor O'Sullivan , Markus Rauscher , Vyacheslav Rovner , Andrzej Strojwas , Marcin Strojwas , Carl Taylor , Rakesh Vallishayee , Larg Weiland , Nobuharu Yokoyama
IPC分类号: H01L29/00 , H01L27/02 , H01L29/45 , H01L23/522 , H01L23/528 , H01L21/66 , H01L21/8234 , H01L27/088 , H01L29/06 , G06F11/07 , G06F17/50
CPC分类号: H01L22/20 , G01R31/303 , G06F11/079 , G06F17/5045 , G06F17/5068 , G06F17/5072 , G06F17/5081 , G06F2217/06 , H01L21/823437 , H01L21/823475 , H01L22/26 , H01L22/32 , H01L22/34 , H01L23/5226 , H01L23/528 , H01L27/0207 , H01L27/088 , H01L27/11803 , H01L27/11807 , H01L28/00 , H01L29/0649 , H01L29/0684 , H01L29/0847 , H01L29/41725 , H01L29/45 , H01L2027/11866 , H01L2027/11875 , H01L2027/11888
摘要: An IC includes first and second designs of experiments (DOES), each comprised of at least two fill cells. The fill cells contain structures configured to obtain in-line data via non-contact electrical measurements (“NCEM”). The first DOE contains fill cells configured to enable non-contact (NC) detection of chamfer shorts, and the second DOE contains fill cells configured to enable NC detection of corner shorts.
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公开(公告)号:US09786650B1
公开(公告)日:2017-10-10
申请号:US15635475
申请日:2017-06-28
申请人: PDF Solutions, Inc.
发明人: Stephen Lam , Dennis Ciplickas , Tomasz Brozek , Jeremy Cheng , Simone Comensoli , Indranil De , Kelvin Doong , Hans Eisenmann , Timothy Fiscus , Jonathan Haigh , Christopher Hess , John Kibarian , Sherry Lee , Marci Liao , Sheng-Che Lin , Hideki Matsuhashi , Kimon Michaels , Conor O'Sullivan , Markus Rauscher , Vyacheslav Rovner , Andrzej Strojwas , Marcin Strojwas , Carl Taylor , Rakesh Vallishayee , Larg Weiland , Nobuharu Yokoyama
IPC分类号: H01L29/00 , H01L27/02 , H01L21/66 , H01L29/417 , H01L29/06 , H01L23/528 , G06F17/50 , G06F11/07
CPC分类号: H01L22/20 , G01R31/303 , G06F11/079 , G06F17/5045 , G06F17/5068 , G06F17/5072 , G06F17/5081 , G06F2217/06 , H01L21/823437 , H01L21/823475 , H01L22/26 , H01L22/32 , H01L22/34 , H01L23/5226 , H01L23/528 , H01L27/0207 , H01L27/088 , H01L27/11803 , H01L27/11807 , H01L28/00 , H01L29/0649 , H01L29/0684 , H01L29/0847 , H01L29/41725 , H01L29/45 , H01L2027/11866 , H01L2027/11875 , H01L2027/11888
摘要: A process for making and using a semiconductor wafer includes instantiating first and second designs of experiments (DOES), each comprised of at least two fill cells. The fill cells contain structures configured to obtain in-line data via non-contact electrical measurements (“NCEM”). The first DOE contains fill cells configured to enable non-contact (NC) detection of snake opens, and the second DOE contains fill cells configured to enable NC detection of metal island opens. The process may further include obtaining NC measurements from the first and/or second DOE(s) and using such measurements, at least in part, to selectively perform additional processing, metrology or inspection steps on the wafer, and/or on other wafer(s) currently being manufactured.
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