公开(公告)号：US20210400258A1

公开(公告)日：2021-12-23

申请号：US17463889

申请日：2021-09-01

Applicant: Panasonic Intellectual Property Corporation of America

Inventor： Jing Ya LI ,  Chong Soon LIM ,  Han Boon TEO ,  Hai Wei SUN ,  Che Wei KUO ,  Kiyofumi ABE ,  Takahiro NISHI ,  Tadamasa TOMA ,  Yusuke KATO

IPC: H04N19/105 ,  H04N19/176 ,  H04N19/52 ,  H04N19/159

Abstract: Provided is an encoder includes: circuitry; and memory coupled to the circuitry, in which in operation, the circuitry: generates a prediction image of a current block to be processed, using a first motion vector; and updates a history based motion vector predictor (HMVP) table using a first candidate having the first motion vector, the HMVP table storing, in a first in first out (FIFO) method, a plurality of second candidates each having a second motion vector used for a processed block, and in the updating of the HMVP table, the circuitry: determines whether a size of the current block is less than or equal to a threshold size; and skips the updating of the HMVP table when the size of the current block is determined to be less than or equal to the threshold size.

公开(公告)号：US20210289198A1

公开(公告)日：2021-09-16

申请号：US17332132

申请日：2021-05-27

Applicant: Panasonic Intellectual Property Corporation of America

Inventor： Ru Ling LIAO ,  Chong Soon LIM ,  Jing Ya LI ,  Han Boon TEO ,  Hai Wei SUN ,  Che Wei KUO ,  Yusuke KATO ,  Tadamasa TOMA ,  Kiyofumi ABE ,  Takahiro NISHI

IPC: H04N19/107 ,  H04N19/176

Abstract: An image encoder includes: circuitry; and a memory coupled to the circuitry. The circuitry, in operation: calculates first values of a current block using intra prediction, the intra prediction being limited to planar mode, the planar mode using multiple reference pixels for each pixel location of the current block; calculates second values of the current block using inter prediction; calculates third values of the current block by weighting the first values and the second values; and encodes the current block using the third values, and in the calculating of the third values, a first weight is applied to the first values and a second weight is applied to the second values, the second weight being different from the first weight.

公开(公告)号：US20210274172A1

公开(公告)日：2021-09-02

申请号：US17321834

申请日：2021-05-17

Applicant: Panasonic Intellectual Property Corporation of America

Inventor： Chong Soon LIM ,  Hai Wei SUN ,  Han Boon TEO ,  Jing Ya LI ,  Che-Wei KUO ,  Kiyofumi ABE ,  Tadamasa TOMA ,  Takahiro NISHI ,  Yusuke KATO

IPC: H04N19/117 ,  H04N19/80 ,  H04N19/51 ,  H04N19/176

Abstract: An encoder that encodes a current block to be encoded in an image is provided. The encoder includes: processor; and memory coupled to the processor, in which, in operation, the processor: generates a first prediction image based on a motion vector, the first prediction image being an image with full-pel precision; generates a second prediction image using an interpolation filter by interpolating a value at a fractional-pel position between full-pel positions included in the first prediction image; and encodes the current block based on the second prediction image, and in the using of the interpolation filter, the interpolation filter is switched between a first interpolation filter and a second interpolation filter differing in a total number of taps from the first interpolation filter.

公开(公告)号：US20210258577A1

公开(公告)日：2021-08-19

申请号：US17306483

申请日：2021-05-03

Applicant: Panasonic Intellectual Property Corporation of America

Inventor： Tadamasa TOMA ,  Takahiro NISHI ,  Kiyofumi ABE ,  Ryuichi KANOH ,  Chong Soon LIM ,  Sughosh Pavan SHASHIDHAR ,  Ru Ling LIAO ,  Hai Wei SUN ,  Han Boon TEO ,  Jing Ya LI

IPC: H04N19/119 ,  H04N19/157 ,  H04N19/176

Abstract: An encoder partitions into blocks using a set of block partition modes. The set of block partition modes includes a first partition mode for partitioning a first block, and a second block partition mode for partitioning a second block which is one of blocks obtained after the first block is partitioned. When the number of partitions of the first block partition mode is three, the second block is a center block among the blocks obtained after partitioning the first block, and the partition direction of the second block partition mode is same as the partition direction of the first block partition mode, the second block partition mode indicates that the number of partitions is only three. A parameter for identifying the second block partition mode includes a first flag indicating a horizontal or vertical partition direction, and does not include a second flag indicating the number of partitions.

公开(公告)号：US20210218970A1

公开(公告)日：2021-07-15

申请号：US17196194

申请日：2021-03-09

Applicant: Panasonic Intellectual Property Corporation of America

Inventor： Jing Ya LI ,  Ru Ling LIAO ,  Chong Soon LIM ,  Han Boon TEO ,  Hai Wei SUN ,  Kiyofumi ABE ,  Takahiro NISHI ,  Tadamasa TOMA

IPC: H04N19/159 ,  H04N19/182 ,  H04N19/117

Abstract: An encoder includes circuitry and memory connected to the circuitry. The circuitry: derives an absolute value of a sum of gradient values in first and second ranges; derives, as a first parameter, a total sum of absolute values of sums of gradient values derived respectively for pairs of relative pixel positions; derives a pixel difference value between pixel values in the first and second ranges; inverts or maintains a plus or minus sign of the pixel difference value, according to a plus or minus sign of the sum of the gradient values indicating the sum of the gradient values in the first and second ranges; derives, as a second parameter, a total sum of pixel difference values each having the plus or minus sign inverted or maintained, the pixel difference values derived respectively for the relative pixel positions; and generates a prediction image using the first and second parameters.

公开(公告)号：US20210044809A1

公开(公告)日：2021-02-11

申请号：US17077450

申请日：2020-10-22

Applicant: Panasonic Intellectual Property Corporation of America

Inventor： Kiyofumi ABE ,  Takahiro NISHI ,  Tadamasa TOMA ,  Ryuichi KANOH ,  Chong Soon LIM ,  Ru Ling LIAO ,  Hai Wei SUN ,  Sughosh Pavan SHASHIDHAR ,  Han Boon TEO ,  Jing Ya LI

IPC: H04N19/176 ,  H04N19/52 ,  H04N19/70 ,  H04N19/105

Abstract: An encoder, includes: circuitry; and memory. Using the memory, the circuitry: in inter prediction for a current block, determines a base motion vector, and writes, in an encoded signal, a delta motion vector representing (i) one direction among a plurality of directions including a diagonal direction and (ii) a distance from the base motion vector; and encodes the current block using the delta motion vector and the base motion vector as a motion vector of the current block.

公开(公告)号：US20210006784A1

公开(公告)日：2021-01-07

申请号：US16875542

申请日：2020-05-15

Applicant: Panasonic Intellectual Property Corporation of America

Inventor： Chong Soon LIM ,  Hai Wei SUN ,  Han Boon TEO ,  Jing Ya LI ,  Che-Wei KUO ,  Tadamasa TOMA ,  Takahiro NISHI ,  Kiyofumi ABE ,  Yusuke KATO

IPC: H04N19/119 ,  H04N19/503 ,  H04N19/186 ,  H04N19/593 ,  H04N19/117 ,  H04N19/91 ,  H04N19/124 ,  H04N19/176

Abstract: An encoder includes circuitry and memory coupled to the circuitry. The circuitry determines whether to split a current luma virtual pipeline decoding unit (VPDU) into smaller blocks. When it is determined not to split the current luma VPDU into smaller blocks, scaling prediction residuals of chroma samples based on prediction residuals of luma samples is not performed. When it is determined to split the luma VPDU into smaller blocks, scaling the prediction residuals of chroma samples based on prediction residuals of luma samples is performed. The block is encoded based on the prediction residuals of chroma samples.

公开(公告)号：US20200322625A1

公开(公告)日：2020-10-08

申请号：US16904032

申请日：2020-06-17

Applicant: Panasonic Intellectual Property Corporation of America

Inventor： Kiyofumi ABE ,  Takahiro NISHI ,  Tadamasa TOMA ,  Ryuichi KANOH ,  Chong Soon LIM ,  Hai Wei SUN ,  Sughosh Pavan SHASHIDHAR ,  Han Boon TEO ,  Ru Ling LIAO ,  Jing Ya LI

IPC: H04N19/52 ,  H04N19/537 ,  H04N19/513

Abstract: An encoder includes circuitry and memory. The circuitry performs: obtaining first motion vector information of a first partition; obtaining second motion vector information of a second partition; deriving a set of prediction samples for the first partition; and encoding the first partition using the set. When the difference between the motion vector information is not greater than a value, the circuitry reflects a second set of samples to a first set of samples. The first set has been predicted for the first partition using the first motion vector information, and the second set has been predicted for a first range using the second motion vector information. When the difference is greater than the value, the circuitry reflects, to the first set of samples, a third set of samples predicted for a second range larger than the first range using the second motion vector information.

公开(公告)号：US20200304827A1

公开(公告)日：2020-09-24

申请号：US16894020

申请日：2020-06-05

Applicant: Panasonic Intellectual Property Corporation of America

Inventor： Kiyofumi ABE ,  Takahiro NISHI ,  Tadamasa TOMA ,  Ryuichi KANOH ,  Chong Soon LIM ,  Ru Ling LIAO ,  Hai Wei SUN ,  Sughosh Pavan SHASHIDHAR ,  Han Boon TEO ,  Jing Ya LI

IPC: H04N19/513 ,  H04N19/563 ,  H04N19/132 ,  H04N19/176

Abstract: The present disclosure provides systems and methods for video coding. The systems include, for example, an image encoder comprising: circuitry; and a memory coupled to the circuitry, wherein the circuitry, in operation, performs the following: predicting a first block of prediction samples for a current block of a picture, wherein predicting the first block of prediction samples includes at least a prediction process with a motion vector from a different picture; padding the first block of prediction samples to form a second block of prediction samples, wherein the second block is larger than the first block; calculating at least a gradient using the second block of prediction samples; and encoding the current block using at least the calculated gradient.

公开(公告)号：US20190273938A1

公开(公告)日：2019-09-05

申请号：US16291289

申请日：2019-03-04

Applicant: Panasonic Intellectual Property Corporation of America

Inventor： Kiyofumi ABE ,  Takahiro NISHI ,  Tadamasa TOMA ,  Ryuichi KANOH ,  Chong Soon LIM ,  Ru Ling LIAO ,  Hai Wei SUN ,  Sughosh Pavan SHASHIDHAR ,  Han Boon TEO ,  Jing Ya LI

IPC: H04N19/52 ,  H04N19/176 ,  H04N19/70 ,  H04N19/44

Abstract: An encoder includes circuitry and memory. The circuitry, using the memory: calculates at least one difference value between a plurality of pixels in a first block of a current image; calculates a denominator value used for a second block, using the difference value, the denominator value being used for a plurality of sub-blocks of the first block, the second block being one of the plurality of sub-blocks; determines a shift value, using the denominator value; calculates a first value and a second value, using at least a shift operation with the shift value; determines a prediction sample for the second block, using at least the first value and the second value; and encodes the second block, using at least the prediction sample.