公开(公告)号：US20220130337A1

公开(公告)日：2022-04-28

申请号：US17569058

申请日：2022-01-05

Applicant: Samsung Display Co., LTD.

Inventor： Hyun Joon KIM

IPC: G09G3/3266 ,  G09G3/3275

Abstract: A scan driver includes stages, each of the stages receiving first and second clock signals having a first low level as an active level, and a third clock signal having a high level as the active level. Each of the stages includes a logic circuit that changes a voltage of a first node to the first low level based on an input signal and the first clock signal, and changes a voltage of the first node to a second low level lower than the first low level based on the second clock signal, a first output buffer that outputs, as an active-low scan signal, the second clock signal in response to the voltage of the first node, and a second output buffer that outputs, as an active-high scan signal, the third clock signal in response to the voltage of the first node.

公开(公告)号：US20200302840A1

公开(公告)日：2020-09-24

申请号：US16821706

申请日：2020-03-17

Applicant: Samsung Display Co., LTD.

Inventor： Hyun Joon KIM ,  Jun Ki JEONG ,  Kyung Hoon CHUNG ,  Kyung Bae KIM ,  Seung Chan LEE ,  Chong Chul CHAI

IPC: G09G3/00

Abstract: A method of testing a display panel including a pixel coupled to first, second, and third power lines, a data line, scan lines, an emission control line, and a test line, the method includes: applying a first power supply voltage to the first power line; applying a test voltage having a turn-on voltage level to the second power line; applying a scan signal having a turn-on voltage level sequentially to the scan lines and an emission control signal having a turn-on voltage level to the emission control line; applying a gate signal to the test line to turn on a test transistor coupled between two electrode of a light emitting element included in the pixel; measuring a sensing voltage output through the data line; and determining whether the pixel is defective, based on a voltage level of the measured sensing voltage.

公开(公告)号：US20160147122A1

公开(公告)日：2016-05-26

申请号：US14946620

申请日：2015-11-19

Applicant: Samsung Display Co., Ltd.

Inventor： In-Jae HWANG ,  Mee Hye JUNG ,  Hyun Joon KIM ,  Il Gon KIM

IPC: G02F1/1362 ,  G02F1/1343 ,  G02F1/1335 ,  G02F1/1368

CPC classification number: G02F1/134309 ,  G02F1/133512 ,  G02F1/136286 ,  H01L27/3211

Abstract: A display device may include a transistor, which includes a first transistor electrode and a second transistor electrode. The display device may further include a pixel electrode, which is electrically connected to the second transistor electrode. The display device may further include a data line, which is electrically connected to the first transistor electrode, wherein the data line includes a bent structure. The display device may further include a light blocking member, which includes a light blocking portion, wherein the light blocking portion extends perpendicular to a section of the data line, and wherein the light blocking portion overlaps both the transistor and the bent structure without overlapping the section of the data line in a direction perpendicular to the light blocking member.

Abstract translation: 显示装置可以包括晶体管，其包括第一晶体管电极和第二晶体管电极。 显示装置还可以包括电连接到第二晶体管电极的像素电极。 显示装置还可以包括电连接到第一晶体管电极的数据线，其中数据线包括弯曲结构。 显示装置还可以包括遮光构件，其包括遮光部分，其中遮光部分垂直于数据线的一部分延伸，并且其中遮光部分与晶体管和弯曲结构重叠，而不会重叠 在垂直于光阻挡构件的方向上的数据线的截面。

公开(公告)号：US20150287392A1

公开(公告)日：2015-10-08

申请号：US14456926

申请日：2014-08-11

Applicant: Samsung Display Co., Ltd.

Inventor： Jong Hee KIM ,  Hyun Joon KIM ,  Kyoung Ju SHIN ,  Alexander WARD ,  Cheol-Gon LEE ,  Chong Chul CHAI

IPC: G09G5/18 ,  G09G3/36 ,  H03K17/693

CPC classification number: H03K17/693 ,  G09G3/3677 ,  G09G2310/0286 ,  G09G2310/06

Abstract: A stage includes a first transistor including an input terminal to which a clock signal is applied and a control terminal connected to a first node; a first capacitor including terminals respectively connected to the first node and an output terminal of the first transistor; a second transistor including an input terminal connected to the output terminal of the first transistor, a control terminal connected to a second node, and an output terminal to which a low voltage is applied; a third transistor including an output terminal connected to the second node, a control terminal connected to the first node, and an input terminal to which the low voltage is applied; and a fourth transistor including an input terminal connected to the first node and an output terminal to which the low voltage is applied, wherein the fourth transistor is switched according to an output signal of a next stage.

Abstract translation: 舞台包括：第一晶体管，包括施加时钟信号的输入端子和连接到第一节点的控制端子; 第一电容器，包括分别连接到第一节点的端子和第一晶体管的输出端子; 第二晶体管，包括连接到第一晶体管的输出端子的输入端子，连接到第二节点的控制端子和施加低电压的输出端子; 第三晶体管，包括连接到第二节点的输出端子，连接到第一节点的控制端子和施加低电压的输入端子; 以及第四晶体管，其包括连接到所述第一节点的输入端子和施加所述低电压的输出端子，其中所述第四晶体管根据下一级的输出信号被切换。