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    Time-resolving sensor using shared PPD+SPAD pixel and spatial-temporal correlation for range measurement
    71.
    发明授权
    Time-resolving sensor using shared PPD+SPAD pixel and spatial-temporal correlation for range measurement 有权

    公开(公告)号：US10397553B2

    公开(公告)日：2019-08-27

    申请号：US16134954

    申请日：2018-09-18

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Yibing Michelle Wang ,  Lilong Shi ,  Ilia Ovsiannikov

    IPC: H04N13/254 ,  H04N5/3745 ,  H04N5/369 ,  G01S17/89 ,  H04N5/378 ,  G01S17/10 ,  G01S7/486

    Abstract: A Time-of-Flight (TOF) technique is combined with analog amplitude modulation within each pixel in a pixel array using multiple Single Photon Avalanche Diodes (SPADs) in conjunction with a single Pinned Photo Diode (PPD) in each pixel. A SPAD may be shared among multiple neighboring pixels. The TOF information is added to the received light signal by the analog domain-based single-ended to differential converter inside the pixel itself. The spatial-temporal correlation among outputs of multiple, adjacent SPADs in a pixel is used to control the operation of the PPD to facilitate recording of TOF values and range of an object. Erroneous range measurements due to ambient light are prevented by stopping the charge transfer from the PPD—and, hence, recording a TOF value—only when two or more SPADs in the pixel are triggered within a pre-defined time interval. An autonomous navigation system with multi-SPAD pixels provides improved vision for drivers under difficult driving conditions.

    NEURAL PROCESSING ACCELERATOR
    72.
    发明申请
    NEURAL PROCESSING ACCELERATOR 审中-公开

    公开(公告)号：US20190187983A1

    公开(公告)日：2019-06-20

    申请号：US15916189

    申请日：2018-03-08

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Ilia Ovsiannikov ,  Yibing Michelle Wang

    IPC: G06F9/30 ,  G06N3/08

    CPC classification number: G06F9/3001 ,  G06F9/3004 ,  G06F9/30098 ,  G06N3/08

    Abstract: A system for calculating. A scratch memory is connected to a plurality of configurable processing elements by a communication fabric including a plurality of configurable nodes. The scratch memory sends out a plurality of streams of data words. Each data word is either a configuration word used to set the configuration of a node or of a processing element, or a data word carrying an operand or a result of a calculation. Each processing element performs operations according to its current configuration and returns the results to the communication fabric, which conveys them back to the scratch memory.

    Image denoising with color-edge contrast preserving
    73.
    发明授权
    Image denoising with color-edge contrast preserving 有权

    公开(公告)号：US10262399B2

    公开(公告)日：2019-04-16

    申请号：US15458020

    申请日：2017-03-13

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Lilong Shi ,  Ilia Ovsiannikov

    IPC: G06K9/00 ,  G06T5/00 ,  G06T3/40

    Abstract: A color-edge contrast preserver includes a demosaicing module, a color-correcting module, a converter module and a chromatic-denoising module. The demosaicing module may demosaic a red-white-blue (RWB) pixel image of the image. The color-correcting module may color correct the demosaiced RWB pixel image and may produce a red-green-blue (RGB) pixel image from the color-corrected demosaiced RWB pixel image. The converter module to convert the RGB pixel image to a hue-saturation-value (HSV) pixel image and to generate a similarity kernel ΔY. The chromatic-denoising module may denoise a red pixel image and a blue pixel image of the RWB pixel image using the similarity kernel ΔY.

    CMOS image sensor for depth measurement using triangulation with point scan
    74.
    发明授权
    CMOS image sensor for depth measurement using triangulation with point scan 有权

    公开(公告)号：US10145678B2

    公开(公告)日：2018-12-04

    申请号：US14842822

    申请日：2015-09-01

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Yibing Michelle Wang ,  Ilia Ovsiannikov ,  Dirk Smits

    IPC: H04N5/00 ,  G01B11/22 ,  H04N5/225 ,  G01B11/25 ,  G03B15/02 ,  H04N5/232 ,  G06T7/521 ,  G03B17/54 ,  H04N13/271

    Abstract: Using the same image sensor to capture both a two-dimensional (2D) image of a three-dimensional (3D) object and 3D depth measurements for the object. A laser point-scans the surface of the object with light spots, which are detected by a pixel array in the image sensor to generate the 3D depth profile of the object using triangulation. Each row of pixels in the pixel array forms an epipolar line of the corresponding laser scan line. Timestamping provides a correspondence between the pixel location of a captured light spot and the respective scan angle of the laser to remove any ambiguity in triangulation. An Analog-to-Digital Converter (ADC) in the image sensor generates a multi-bit output in the 2D mode and a binary output in the 3D mode to generate timestamps. Strong ambient light is rejected by switching the image sensor to a 3D logarithmic mode from a 3D linear mode.

    Imaging device with 4-lens time-of-flight pixels and interleaved readout thereof
    77.
    发明授权
    Imaging device with 4-lens time-of-flight pixels and interleaved readout thereof 有权

    公开(公告)号：US09716819B2

    公开(公告)日：2017-07-25

    申请号：US14599444

    申请日：2015-01-16

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Ilia Ovsiannikov

    IPC: H04N5/00 ,  H04N5/225 ,  H04N5/232

    CPC classification number: H04N5/2258 ,  H04N5/2329

    Abstract: Ranging devices, systems, and methods are provided. In embodiments, a device includes a casing with four openings and an array with depth pixels. The depth pixels are arranged in four quadrants, so that pixels in each of the quadrants receive light through one of the four openings. The depth pixels may generate samples in response to the received light. For a certain frame, a controller reads out samples from each of the quadrants before completing reading out the samples of any one of the quadrants. In some embodiments, reading out is performed by using interleaved rolling shutter for the rows.

    Low power computation architecture
    80.
    发明授权
    Low power computation architecture 有权
    低功耗计算架构

    公开(公告)号：US09411726B2

    公开(公告)日：2016-08-09

    申请号：US14712884

    申请日：2015-05-14

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Ilia Ovsiannikov ,  Zhengping Ji ,  Yibing Michelle Wang ,  Hongyu Wang

    IPC: G06F7/38 ,  G06F12/08 ,  G06T1/20 ,  G11C7/10

    CPC classification number: G06F12/0802 ,  G06T1/20 ,  G11C7/1039 ,  G11C7/1069

    Abstract: An embodiment includes a system, comprising a first memory; a plurality of first circuits, wherein each first circuit is coupled to the memory; and includes a second circuit configured to generate a first output value in response to an input value received from the first memory; and an accumulator configured to receive the first output value and generate a second output value; and a controller coupled to the memory and the first circuits, and configured to determine the input values to be transmitted from the memory to the first circuits.

    Abstract translation: 一个实施例包括一个系统，包括一个第一存储器; 多个第一电路，其中每个第一电路耦合到所述存储器; 并且包括被配置为响应于从第一存储器接收的输入值产生第一输出值的第二电路; 以及累加器，被配置为接收所述第一输出值并产生第二输出值; 以及控制器，其耦合到所述存储器和所述第一电路，并且被配置为确定要从所述存储器发送到所述第一电路的输入值。

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