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公开(公告)号：US12086700B2
公开(公告)日：2024-09-10
申请号：US16552619
申请日：2019-08-27
发明人： Ilia Ovsiannikov , Ali Shafiee Ardestani , Joseph H. Hassoun , Lei Wang , Sehwan Lee , JoonHo Song , Jun-Woo Jang , Yibing Michelle Wang , Yuecheng Li
CPC分类号： G06N3/04 , G06F17/153 , G06F17/16 , G06N3/08 , G06T9/002 , G06F9/3001
摘要： A neural processor. In some embodiments, the processor includes a first tile, a second tile, a memory, and a bus. The bus may be connected to the memory, the first tile, and the second tile. The first tile may include: a first weight register, a second weight register, an activations buffer, a first multiplier, and a second multiplier. The activations buffer may be configured to include: a first queue connected to the first multiplier and a second queue connected to the second multiplier. The first queue may include a first register and a second register adjacent to the first register, the first register being an output register of the first queue. The first tile may be configured: in a first state: to multiply, in the first multiplier, a first weight by an activation from the output register of the first queue, and in a second state: to multiply, in the first multiplier, the first weight by an activation from the second register of the first queue.
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公开(公告)号：US11783162B2
公开(公告)日：2023-10-10
申请号：US16552619
申请日：2019-08-27
发明人： Ilia Ovsiannikov , Ali Shafiee Ardestani , Joseph H. Hassoun , Lei Wang , Sehwan Lee , JoonHo Song , Jun-Woo Jang , Yibing Michelle Wang , Yuecheng Li
CPC分类号： G06N3/04 , G06F17/153 , G06F17/16 , G06N3/08 , G06T9/002 , G06F9/3001
摘要： A neural processor. In some embodiments, the processor includes a first tile, a second tile, a memory, and a bus. The bus may be connected to the memory, the first tile, and the second tile. The first tile may include: a first weight register, a second weight register, an activations buffer, a first multiplier, and a second multiplier. The activations buffer may be configured to include: a first queue connected to the first multiplier and a second queue connected to the second multiplier. The first queue may include a first register and a second register adjacent to the first register, the first register being an output register of the first queue. The first tile may be configured: in a first state: to multiply, in the first multiplier, a first weight by an activation from the output register of the first queue, and in a second state: to multiply, in the first multiplier, the first weight by an activation from the second register of the first queue.
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公开(公告)号：US11671111B2
公开(公告)日：2023-06-06
申请号：US16842662
申请日：2020-04-07
CPC分类号： H03M7/3066 , G06F9/30018 , G06F9/30036 , G06F9/30145 , G06F9/3818 , G06F9/3851 , H03M7/40 , H03M7/6005 , H03M7/6011 , H03M7/6023 , H04L5/023
摘要： A multichannel data packer includes a plurality of two-input multiplexers and a controller. The plurality of two-input multiplexers is arranged in 2N rows and N columns in which N is an integer greater than 1. Each input of a multiplexer in a first column receives a respective bit stream of 2N channels of bit streams. Each respective bit stream includes a bit-stream length based on data in the bit stream. The multiplexers in a last column output 2N channels of packed bit streams each having a same bit-stream length. The controller controls the plurality of multiplexers so that the multiplexers in the last column output the 2N channels of bit streams that each has the same bit-stream length.
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4.发明授权公开(公告)号：US11579842B2
公开(公告)日：2023-02-14
申请号：US17151115
申请日：2021-01-15
摘要： An N×N multiplier may include a N/2×N first multiplier, a N/2×N/2 second multiplier, and a N/2×N/2 third multiplier. The N×N multiplier receives two operands to multiply. The first, second and/or third multipliers are selectively disabled if an operand equals zero or has a small value. If the operands are both less than 2N/2, the second or the third multiplier are used to multiply the operands. If one operand is less than 2N/2 and the other operand is equal to or greater than 2N/2, the first multiplier is used or the second and third multipliers are used to multiply the operands. If both operands are equal to or greater than 2N/2, the first, second and third multipliers are used to multiply the operands.
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5.发明授权公开(公告)号：US10963220B2
公开(公告)日：2021-03-30
申请号：US16276582
申请日：2019-02-14
摘要： An N×N multiplier may include a N/2×N first multiplier, a N/2×N/2 second multiplier, and a N/2×N/2 third multiplier. The N×N multiplier receives two operands to multiply. The first, second and/or third multipliers are selectively disabled if an operand equals zero or has a small value. If the operands are both less than 2N/2, the second or the third multiplier are used to multiply the operands. If one operand is less than 2N/2 and the other operand is equal to or greater than 2N/2, the first multiplier is used or the second and third multipliers are used to multiply the operands. If both operands are equal to or greater than 2N/2, the first, second and third multipliers are used to multiply the operands.
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公开(公告)号：US10547830B2
公开(公告)日：2020-01-28
申请号：US14989554
申请日：2016-01-06
IPC分类号： H04N13/257 , G03B35/02 , H04N13/254 , G01B11/25 , H04N13/296 , G03B35/08 , G03B35/10 , H04N13/207
摘要： An apparatus and a method are provided. The apparatus includes a light source configured to project light in a changing pattern that reduces the light's noticeability; collection optics through which light passes and forms an epipolar plane with the light source; and an image sensor configured to receive light passed through the collection optics to acquire image information and depth information simultaneously. The method includes projecting light by a light source in a changing pattern that reduces the light's noticeability; passing light through collection optics and forming an epipolar plane between the collection optics and the light source; and receiving in an image sensor light passed through the collection optics to acquire image information and depth information simultaneously.
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公开(公告)号：US20200026979A1
公开(公告)日：2020-01-23
申请号：US16552850
申请日：2019-08-27
发明人： Ilia Ovsiannikov , Ali Shafiee Ardestani , Joseph H. Hassoun , Lei Wang , Sehwan Lee , JoonHo Song , Jun-Woo Jang , Yibing Michelle Wang , Yuecheng Li
摘要： A neural processor. In some embodiments, the processor includes a first tile, a second tile, a memory, and a bus. The bus may be connected to the memory, the first tile, and the second tile. The first tile may include: a first weight register, a second weight register, an activations buffer, a first multiplier, and a second multiplier. The activations buffer may be configured to include: a first queue connected to the first multiplier and a second queue connected to the second multiplier. The first queue may include a first register and a second register adjacent to the first register, the first register being an output register of the first queue. The first tile may be configured: in a first state: to multiply, in the first multiplier, a first weight by an activation from the output register of the first queue, and in a second state: to multiply, in the first multiplier, the first weight by an activation from the second register of the first queue.
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公开(公告)号：US10531073B2
公开(公告)日：2020-01-07
申请号：US15157389
申请日：2016-05-17
发明人： Ilia Ovsiannikov
IPC分类号： H04N13/246 , H04N13/257 , G01C3/08 , G01C25/00 , G01C11/30 , H04N13/254 , H04N13/271
摘要： Using one or more patterned markers inside the projector module of a three-dimensional (3D) camera to facilitate automatic calibration of the camera's depth sensing operation. The 3D camera utilizes epipolar geometry-based imaging in conjunction with laser beam point-scans in a triangulation-based approach to depth measurements. A light-sensing element and one or more reflective markers inside the projector module facilitate periodic self-calibration of camera's depth sensing operation. To calibrate the camera, the markers are point-scanned using the laser beam and the reflected light is sensed using the light-sensing element. Based on the output of the light-sensing element, the laser's turn-on delay is adjusted to perfectly align a laser light spot with the corresponding reflective marker. Using reflective markers, the exact direction and speed of the scanning beam over time can be determined as well. The marker-based automatic calibration can periodically run in the background without interfering with the normal camera operation.
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公开(公告)号：US10021284B2
公开(公告)日：2018-07-10
申请号：US14960339
申请日：2015-12-04
IPC分类号： H04N5/225 , G06T7/00 , H04N5/222 , G01S7/00 , H04N5/374 , H04N13/00 , H04N5/3745 , H04N13/02
CPC分类号： H04N5/2256 , G01S7/00 , G01S17/10 , G01S17/89 , G06T7/50 , H04N5/2226 , H04N5/3745 , H04N13/128 , H04N13/133 , H04N13/254 , H04N13/271
摘要： A method and a system are disclosed for detecting a depth of an object illuminated by at least one first light pulse. Detection of light reflected from the object illuminated by the at least one first light pulse by a first row of pixels of 2D pixel array is enabled for a first predetermined period of time in which the first row of pixels forms an epipolar line of a scanning line of a first light pulse. Enabling of the detection by the first row of pixels for the first predetermined period of time occurs a second predetermined period of time after a beginning of a pulse cycle T of the at least one first light pulse. Detection signals are generated corresponding to the detected light reflected from the object, and the generated detection signals are used to determine a depth of the object.
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公开(公告)号：US20180121724A1
公开(公告)日：2018-05-03
申请号：US14500674
申请日：2014-09-29
发明人： Ilia Ovsiannikov , Yibing (Michelle) Wang , Yong-Hwa Park , Yong-Chul Cho , Heesun Yoon , ChangYoung Park , Dirk Smits
CPC分类号： G06K9/00604 , G06F21/32 , G06K9/00033 , G06K9/00617 , G06K9/4609 , G06T7/586 , G06T2207/20201 , G07C9/00158
摘要： Exemplary embodiments for a biometric camera system for a mobile device, comprise: a near infrared (NIR) light source on the mobile device that flashes a user of the mobile device with near infrared light during image capture; a biometric camera located on the mobile device offset from the NIR light source, the biometric camera comprising: an extended depth of field (EDOF) imaging lens; a bandpass filter located adjacent to the EDOF imaging lens to reject ambient light during image capture; and an imaging sensor located adjacent the bandpass filter that converts an optical image of an object into an electronic signal for image processing; and a processor configured to receive video images of an iris of a user from the image sensor, and attempt to match the video images of the iris with previously registered images stored in an iris database, wherein if a match is found, the user is authenticated.
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