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71.发明授权Integrating photosensor and imaging system having wide dynamic range with varactors 失效用变容二极管整合具有宽动态范围的光电传感器和成像系统
公开(公告)号：US5260592A
公开(公告)日：1993-11-09
申请号：US760569
申请日：1991-09-16
申请人： Carver A. Mead , Federico Faggin
发明人： Carver A. Mead , Federico Faggin
IPC分类号： H01L27/146 , H01L27/14
CPC分类号： H01L27/14681
摘要： A bipolar phototransistor comprises both an integrating photosensor and a switching element. The base terminal of the bipolar phototransistor is utilized as the switch-control node for the pixel and its emitter is the output node of the integrating photosensor. A plurality of integrating photosensors may be placed in an array of rows and columns, wherein the bases of all bipolar phototransistors in a row are capacitively coupled together to a common row-select line, and the emitters of all bipolar phototransistors in a column are connected together to a column sense line. The input of a sense amplifier is connected to the sense line of each column of integrating photosensors. An integrating sense amplifier according to the present invention includes an amplifying element having an inverting input connected to the sense line. A capacitor, preferably a varactor, is also connected between the inverting input and output of the amplifying element. An exponential feedback element may be provided in the sense amplifiers for signal compression at high light levels.
摘要翻译： 双极光电晶体管包括积分光电传感器和开关元件。 双极光电晶体管的基极用作像素的开关控制节点，其发射极是积分光电传感器的输出节点。 多个积分光电传感器可以放置在行和列的阵列中，其中一行中的所有双极光电晶体管的基极电容耦合到一个共同的行选择线，并且列中的所有双极光电晶体管的发射极被连接 一起到列感觉线。 读出放大器的输入端连接到每列积分光电传感器的感测线。 根据本发明的积分读出放大器包括具有连接到感测线的反相输入的放大元件。 电容器，优选变容二极管，也连接在放大元件的反相输入和输出之间。 可以在读出放大器中提供指数反馈元件，用于在高光级下进行信号压缩。
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72.发明授权
公开(公告)号：US5204549A
公开(公告)日：1993-04-20
申请号：US827005
申请日：1992-01-28
IPC分类号： G06N3/063
CPC分类号： G06N3/0635
摘要： A weight-storage and weight-adjustment circuit includes a first hot electron injection device coupled to a first floating gate and a second hot electron injection device coupled to the second floating gate. The floating gates are associated with two series connected MOS transistors. The first and second hot electron injection devices comprise gated lateral bipolar transistors. The weight may be decreased by injecting hot electrons from the first hot electron injection device onto the first floating gate to decrease the first analog voltage and increased by injecting electrons from the second hot electron injection device onto the second floating gate to decrease the second analog voltage. Circuitry are provided to periodically adjust the absolute voltage levels on the first and second floating gates to prevent them from becoming too negative over time. First and second electron tunneling devices are coupled to the first and second floating gates, respectively, to simultaneously adjust the voltages stored on the floating gates to keep them within a desired voltage range.
摘要翻译： 重量存储和重量调节电路包括耦合到第一浮动栅极的第一热电子注入装置和耦合到第二浮动栅极的第二热电子注入装置。 浮动栅极与两个串联的MOS晶体管相关联。 第一和第二热电子注入装置包括门控侧向双极晶体管。 可以通过将热电子从第一热电子注入装置注入到第一浮动栅极上来减小第一模拟电压并通过将电子从第二热电子注入装置注入到第二浮栅上来增加，从而减小第二模拟电压 。 提供电路以周期性地调整第一和第二浮动栅极上的绝对电压电平，以防止它们随时间变得太负。 第一和第二电子隧穿装置分别耦合到第一和第二浮动栅极，以同时调节存储在浮动栅极上的电压以将它们保持在期望的电压范围内。
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公开(公告)号：US5146106A
公开(公告)日：1992-09-08
申请号：US650959
申请日：1991-02-05
CPC分类号： H01L27/0629 , G06N3/063 , H03F1/0261 , H03F1/303 , H03F3/45479 , H03F3/45753 , H03F3/45977
摘要： An adaptable MOS winner take all circuit includes a plurality of adaptable current mirrors. Each adaptable current mirror includes a floating node onto which and from which electrons may be transported by control signals and electrical semiconductor structures. Electrons may be placed onto and removed from a floating node associated with at least one MOS insulated gate field effect transistor, usually the gate of the transistor, in an analog manner, by application of first and second electrical control signals. A first electrical control signal controls the injection of electrons onto the floating node from an electron injection structure and the second electrical control signal controls the removal of electrons from the floating node by an electron removal structure.
摘要翻译： 可适应的MOS优胜者采取所有电路包括多个适应电流镜。 每个可适应电流镜包括浮动节点，电子可以通过控制信号和电半导体结构传输到该浮动节点上。 通过施加第一和第二电控制信号，电子可以以模拟的方式放置在与至少一个MOS绝缘栅场效应晶体管（通常是晶体管的栅极）相关联的浮动节点上并从其移除。 第一电控信号控制电子从电子注入结构注入到浮动节点上，第二电控信号通过电子去除结构控制从浮动节点去除电子。
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公开(公告)号：US5126685A
公开(公告)日：1992-06-30
申请号：US746962
申请日：1991-08-19
IPC分类号： H03F3/30
CPC分类号： H03F3/3022 , H03F3/3001 , H03F2203/30006 , H03F2203/30009 , H03F2203/30084 , H03F2203/30117
摘要： A linear voltage-to-current converter (LVCC) circuit includes two transistors, one P-channel and one N-channel. The input voltage is applied to the gates of both transistors. The drains of the two transistors are connected. The source of the p-type transistor is connected to a first voltage rail, and the source of the N-channel is connected to a second voltage rail of lower voltage. The output is the difference between the current through the P-channel transistor and the N-channel transistor. A linear current-to-voltage converter (LCVC) circuit is similar to the LVCC circuit, except that the gates of the transistors are tied to the drains of the transistors. The input current is supplied to the drains, and the output voltage is the voltage of the drains.
摘要翻译： 线性电压 - 电流转换器（LVCC）电路包括两个晶体管，一个P沟道和一个N沟道。 输入电压被施加到两个晶体管的栅极。 两个晶体管的漏极相连。 p型晶体管的源极连接到第一电压轨，并且N沟道的源极连接到具有较低电压的第二电压轨。 输出是通过P沟道晶体管和N沟道晶体管的电流之差。 线性电流 - 电压转换器（LCVC）电路类似于LVCC电路，只是晶体管的栅极连接到晶体管的漏极。 输入电流被提供给排水管，输出电压是排水管的电压。
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公开(公告)号：US5109261A
公开(公告)日：1992-04-28
申请号：US607158
申请日：1990-10-31
申请人： Carver A. Mead , Timothy P. Allen
发明人： Carver A. Mead , Timothy P. Allen
CPC分类号： H03F1/0261 , G06N3/063 , H01L27/0629 , H03F1/303 , H03F3/45479 , H03F3/45753 , H03F3/45977
摘要： An integrated circuit amplifier having a random input offset voltage is adaptable such that the input offset voltage may be cancelled out. An inverting input node is a floating input node and is coupled to a source of input signal by a first capacitor. A second capacitor is connected between the output of the amplifier and the floating node. An ultraviolet window above the second capacitor allows the floating node to be charged, by the application of ultraviolet light, to a voltage which effectively cancels the input offset voltage. The ultraviolet window and capacitor electrodes are arranged such that the ultraviolet light may strike only the desired areas of the structure.
摘要翻译： 具有随机输入偏移电压的集成电路放大器是可适应的，使得可以抵消输入偏移电压。 反相输入节点是浮动输入节点，并通过第一电容器耦合到输入信号源。 第二电容器连接在放大器的输出端和浮动节点之间。 第二电容器上方的紫外线窗口允许通过施加紫外线将浮动节点充电到有效地抵消输入偏移电压的电压。 紫外线窗口和电容器电极被布置成使得紫外光可以仅击打结构的期望区域。
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公开(公告)号：US5107149A
公开(公告)日：1992-04-21
申请号：US746960
申请日：1991-08-19
IPC分类号： H03F3/30
CPC分类号： H03F3/3022 , H03F3/3001 , H03F2203/30006 , H03F2203/30009 , H03F2203/30084 , H03F2203/30117
摘要： A linear voltage-to-current converter (LVCC) circuit includes two transistors, one P-channel and one N-channel. The input voltage is applied to the gates of both transistors. The drains of the two transistors are connected. The source of the p-type transistor is connected to a first voltage rail, and the source of the N-channel is connected to a second voltage rail of lower voltage. The output is the difference between the current through the P-channel transistor and the N-channel transistor. A linear current-to-voltage converter (LCVC) circuit is similar to the LVCC circuit, except that the gates of the transistors are tied to the drains of the transistors. The input current is supplied to the drains, and the output voltage is the voltage of the drains.
摘要翻译： 线性电压 - 电流转换器（LVCC）电路包括两个晶体管，一个P沟道和一个N沟道。 输入电压被施加到两个晶体管的栅极。 两个晶体管的漏极相连。 p型晶体管的源极连接到第一电压轨，并且N沟道的源极连接到具有较低电压的第二电压轨。 输出是通过P沟道晶体管和N沟道晶体管的电流之差。 线性电流 - 电压转换器（LCVC）电路类似于LVCC电路，只是晶体管的栅极连接到晶体管的漏极。 输入电流被提供给排水管，输出电压是排水管的电压。
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公开(公告)号：US5073759A
公开(公告)日：1991-12-17
申请号：US607141
申请日：1990-10-31
申请人： Carver A. Mead , Timothy P. Allen
发明人： Carver A. Mead , Timothy P. Allen
CPC分类号： G06N3/063 , H01L27/0629 , H03F1/0261 , H03F1/303 , H03F3/45479 , H03F3/45753 , H03F3/45977
摘要： An integrated circuit amplifier having a random input offset voltage is adaptable such that then input offset voltage may be cancelled out. An inverting input node is a floating input node and is coupled to a source of input signal by a first capacitor. A second capacitor is connected between the output of the amplifier and the floating node. An ultraviolet window above the second capacitor allows the floating node to be charged, by the application of ultraviolet light, to a voltage which effectively cancels the input offset voltage. The ultraviolet window and capacitor electrodes are arranged such that the ultraviolet light may strike only the desired areas of the structure.
摘要翻译： 具有随机输入偏移电压的集成电路放大器是适应性的，从而可以抵消输入偏移电压。 反相输入节点是浮动输入节点，并通过第一电容器耦合到输入信号源。 第二电容器连接在放大器的输出端和浮动节点之间。 第二电容器上方的紫外线窗口允许通过施加紫外线将浮动节点充电到有效地抵消输入偏移电压的电压。 紫外线窗口和电容器电极被布置成使得紫外光可以仅击打结构的期望区域。
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公开(公告)号：US5059920A
公开(公告)日：1991-10-22
申请号：US525764
申请日：1990-05-18
CPC分类号： H03F1/0261 , G06N3/063 , H01L27/0629 , H03F1/303 , H03F3/45479 , H03F3/45753 , H03F3/45977
摘要： Electrons may be placed onto and removed from a floating node associated with at least one MOS transistor, usually the gate of the transistor, in an analog manner, by application of first and second electrical control signals. A first electrical control signal controls the injection of electrons onto the floating node from an electron injection structure and the second electrical control signal controls the removal of electrons from the floating node by an electron removal structure.An analog MOS integrated circuit comprises an amplifier circuit having a gain much larger than 1. The inverting input into one stage of this amplifier circuit is a floating node forming the gate of at least one MOS transistor. A first capacitor couples an input of the circuit to this floating node. Electrical semiconductor structures are provided for both linearly adding and removing charge from the floating gate, thus allowing the offset voltage of the amplifier to be adapted.An integrated circuit amplifier having a random input offset voltage is adaptable such that the input offset voltage may be cancelled out. An inverting input node is a floating input node and is coupled to a source of input signal by a first capacitor. A second capacitor is connected between the output of the amplifier and the floating node. An electrical learning means allows the floating node to be charged or discharged to a voltage which effectively cancels the input offset voltage.
摘要翻译： 通过施加第一和第二电气控制信号，电子可以以模拟方式放置在与至少一个MOS晶体管（通常是晶体管的栅极）相关联的浮动节点上并从其移除。 第一电控信号控制电子从电子注入结构注入到浮动节点上，第二电控信号通过电子去除结构控制从浮动节点去除电子。 模拟MOS集成电路包括具有大于1的增益的放大器电路。该放大器电路的一级的反相输入是形成至少一个MOS晶体管的栅极的浮动节点。 第一个电容将电路的输入耦合到该浮动节点。 提供电气半导体结构用于从浮动栅极线性地添加和去除电荷，从而允许放大器的偏移电压被适配。 具有随机输入偏移电压的集成电路放大器是可适应的，使得可以抵消输入偏移电压。 反相输入节点是浮动输入节点，并通过第一电容器耦合到输入信号源。 第二电容器连接在放大器的输出端和浮动节点之间。 电学习装置允许浮动节点被充电或放电到有效地抵消输入偏移电压的电压。
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79.发明授权Scanning method and apparatus for current signals having large dynamic range 失效具有较大动态范围的电流信号的扫描方法和装置
公开(公告)号：US4876534A
公开(公告)日：1989-10-24
申请号：US152894
申请日：1988-02-05
申请人： Carver A. Mead , Timothy P. Allen
发明人： Carver A. Mead , Timothy P. Allen
CPC分类号： H04N5/335
摘要： There is disclosed herein apparatus and a method for scanning information off a processing plane where the information is contained in a current signal having a very small amplitude and which can change signs and vary in amplitude by as much as five orders of magnitude. The preferred embodiment of the apparatus uses a pair of CMOS pass transistors connected to the individual processing elements and the row select lines. The pass transistors, when turned on, couple the output current from the processor containing the desired information to a column line. The column line is connected to a current to voltage converter in the form of a differential input amplifier having a non linear feedback circuit comprised of two diode connected CMOS transistors operating in the subthreshold region. The non linear feedback circuit provides an exponential transfer function which compresses the dynamic range of the output current from the processor to a smaller and more useable output range for an output voltage. The negative feedback to the inverting input coupled to the column line stabilizes the voltage on the column line to virtual ground thereby eliminating the delay associated with driving the parasitic capacitance of the column line with the very small output current from the processor in an attempt to substantially change the voltage of the column line.
摘要翻译： 这里公开了一种用于从处理平面扫描信息的信息的方法，其中信息被包含在具有非常小幅度的当前信号中，并且可以改变符号并且在幅度上变化多达五个数量级。 该装置的优选实施例使用连接到各个处理元件和行选择线的一对CMOS传输晶体管。 传输晶体管在导通时将来自包含所需信息的处理器的输出电流耦合到列线。 列线连接到具有非线性反馈电路的差分输入放大器形式的电流到电压转换器，该非线性反馈电路由在亚阈值区域中工作的两个二极管连接的CMOS晶体管组成。 非线性反馈电路提供指数传递函数，其将来自处理器的输出电流的动态范围压缩到输出电压的较小且更可用的输出范围。 耦合到列线的反相输入的负反馈将列线上的电压稳定到虚拟接地，从而消除与来自处理器的非常小的输出电流驱动列线的寄生电容相关的延迟，以试图基本上 改变列线的电压。
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