Circuits for linear conversion between currents and voltages
    1.
    发明授权
    Circuits for linear conversion between currents and voltages 失效
    用于电流和电压之间线性转换的电路

    公开(公告)号:US5165054A

    公开(公告)日:1992-11-17

    申请号:US629470

    申请日:1990-12-18

    IPC分类号: H03F3/30

    摘要: A linear voltage-to-current converter (LVCC) circuit includes two transistors, one P-channel and one N-channel. The input voltage is applied to the gates of both transistors. The drains of the two transistors are connected. The source of the p-type transistor is connected to a first voltage rail, and the source of the N-channel is connected to a second voltage rail of lower voltage. The output is the difference between the current through the P-channel transistor and the N-channel transistor. A linear current-to-voltage converter (LCVC) circuit is similar to the LVCC circuit, except that the gates of the transistors are tied to the drains of the transistors. The input current is supplied to the drains, and the output voltage is the voltage of the drains.

    摘要翻译: 线性电压 - 电流转换器(LVCC)电路包括两个晶体管,一个P沟道和一个N沟道。 输入电压被施加到两个晶体管的栅极。 两个晶体管的漏极相连。 p型晶体管的源极连接到第一电压轨,并且N沟道的源极连接到具有较低电压的第二电压轨。 输出是通过P沟道晶体管和N沟道晶体管的电流之差。 线性电流 - 电压转换器(LCVC)电路类似于LVCC电路,只是晶体管的栅极连接到晶体管的漏极。 输入电流被提供给排水管,输出电压是排水管的电压。

    Circuits for linear conversion between voltages and currents
    2.
    发明授权
    Circuits for linear conversion between voltages and currents 失效
    用于电压和电流之间线性转换的电路

    公开(公告)号:US5126685A

    公开(公告)日:1992-06-30

    申请号:US746962

    申请日:1991-08-19

    IPC分类号: H03F3/30

    摘要: A linear voltage-to-current converter (LVCC) circuit includes two transistors, one P-channel and one N-channel. The input voltage is applied to the gates of both transistors. The drains of the two transistors are connected. The source of the p-type transistor is connected to a first voltage rail, and the source of the N-channel is connected to a second voltage rail of lower voltage. The output is the difference between the current through the P-channel transistor and the N-channel transistor. A linear current-to-voltage converter (LCVC) circuit is similar to the LVCC circuit, except that the gates of the transistors are tied to the drains of the transistors. The input current is supplied to the drains, and the output voltage is the voltage of the drains.

    摘要翻译: 线性电压 - 电流转换器(LVCC)电路包括两个晶体管,一个P沟道和一个N沟道。 输入电压被施加到两个晶体管的栅极。 两个晶体管的漏极相连。 p型晶体管的源极连接到第一电压轨,并且N沟道的源极连接到具有较低电压的第二电压轨。 输出是通过P沟道晶体管和N沟道晶体管的电流之差。 线性电流 - 电压转换器(LCVC)电路类似于LVCC电路,只是晶体管的栅极连接到晶体管的漏极。 输入电流被提供给排水管,输出电压是排水管的电压。

    Linear, continuous-time, two quadrant multiplier
    3.
    发明授权
    Linear, continuous-time, two quadrant multiplier 失效
    线性,连续时间,两象限乘数

    公开(公告)号:US5107149A

    公开(公告)日:1992-04-21

    申请号:US746960

    申请日:1991-08-19

    IPC分类号: H03F3/30

    摘要: A linear voltage-to-current converter (LVCC) circuit includes two transistors, one P-channel and one N-channel. The input voltage is applied to the gates of both transistors. The drains of the two transistors are connected. The source of the p-type transistor is connected to a first voltage rail, and the source of the N-channel is connected to a second voltage rail of lower voltage. The output is the difference between the current through the P-channel transistor and the N-channel transistor. A linear current-to-voltage converter (LCVC) circuit is similar to the LVCC circuit, except that the gates of the transistors are tied to the drains of the transistors. The input current is supplied to the drains, and the output voltage is the voltage of the drains.

    摘要翻译: 线性电压 - 电流转换器(LVCC)电路包括两个晶体管,一个P沟道和一个N沟道。 输入电压被施加到两个晶体管的栅极。 两个晶体管的漏极相连。 p型晶体管的源极连接到第一电压轨,并且N沟道的源极连接到具有较低电压的第二电压轨。 输出是通过P沟道晶体管和N沟道晶体管的电流之差。 线性电流 - 电压转换器(LCVC)电路类似于LVCC电路,只是晶体管的栅极连接到晶体管的漏极。 输入电流被提供给排水管,输出电压是排水管的电压。

    Electrically adaptable neural network with post-processing circuitry
    4.
    发明授权
    Electrically adaptable neural network with post-processing circuitry 失效
    具有后处理电路的电适应神经网络

    公开(公告)号:US5331215A

    公开(公告)日:1994-07-19

    申请号:US922535

    申请日:1992-07-30

    摘要: A synaptic array according to the present invention comprises a plurality of electrically-adaptable elements. Electrons may be placed onto and removed from a floating node in each electrically adaptable element associated with at least one MOS insulated gate field effect transistor, usually the gate of the transistor, in an analog manner, by application of first and second electrical control signals generated in response to an adapt signal. The inputs to all synaptic elements in a row are connected to a common row input line. Adapt inputs to all synaptic elements in a column are connected together to a common column adapt line. The current supplied to all amplifiers in a column is commonly provided by a sense line. In order to adapt the synaptic elements in the M row by N column matrix of the present invention, the voltages to which a given column n of the matrix is to be adapted are placed onto the input voltage lines, and the synaptic elements in column n are then simultaneously adapted by assertion of an adapt signal on the adapt line for column n. The vectors of input voltages for adapting successive columns may be placed sequentially onto the row input voltage lines and used to adapt the columns of synaptic elements by assertion of the adapt signals on the appropriate column adapt lines until the entire array is electrically adapted. After each synaptic element has been adapted, the current flowing through it will be maximized when the voltage at the input of the synaptic element equals the voltage to which the synaptic element has been adapted. An electrically adaptable winner-take-all circuit has its inputs connected to the column-sense lines of the array.

    摘要翻译: 根据本发明的突触阵列包括多个电适应元件。 可以通过施加产生的第一和第二电控制信号将电子放置在与至少一个MOS绝缘栅场效应晶体管(通常是晶体管的栅极)相关联的每个电适应元件中的浮动节点上并从其移除, 响应于适配信号。 对一行中所有突触元素的输入连接到公共行输入行。 将输入到列中的所有突触元素的调整连接到公共列适应线。 提供给列中所有放大器的电流通常由感测线提供。 为了适应本发明的M行×N列矩阵中的突触元素,要将矩阵的给定列n适应的电压放置在输入电压线上,并且列n中的突触元素 然后通过在第n列的适应线上断言适配信号同时进行调整。 用于适配连续列的输入电压的矢量可以顺序地放置在行输入电压线上,并且用于通过在适当的列适配线上断言适配信号来适应突触元件的列,直到整个阵列电气适配。 在每个突触元件已经适应之后,当突触元件的输入端的电压等于突触元件适应的电压时,流过它的电流将被最大化。 电气适应性的胜者总线电路的输入连接到阵列的列感测线。

    Continuous synaptic weight update mechanism
    5.
    发明授权
    Continuous synaptic weight update mechanism 失效
    连续突触体重更新机制

    公开(公告)号:US5303329A

    公开(公告)日:1994-04-12

    申请号:US805324

    申请日:1991-12-10

    IPC分类号: G06N3/063 G06G7/12 H03K19/21

    CPC分类号: G06N3/0635

    摘要: A continuous weight-update device for a synaptic element including at least one MOS transistor comprises a floating node having a capacitance associated therewith, the floating gate comprising at least a part of the floating node, first and second input lines, first and second error lines, an electron tunneling structure coupled to the floating node for tunneling electrons from the floating node, and an electron injecting structure coupled to the floating node for injecting electrons onto the floating node. Control circuitry is responsive to signals on the first input and error lines, for activating the electron tunneling structure, and control circuitry is responsive to signals on the second input and error lines, for activating the electron injecting structure. Circuitry is provided for driving signals onto the first and second input and error lines. Both a single synapse and an array of synapses incorporating the continuous weight-update device are also taught.

    摘要翻译: 用于包括至少一个MOS晶体管的突触元件的连续加权更新装置包括具有与其相关联的电容的浮动节点,所述浮动栅极包括浮动节点的至少一部分,第一和第二输入线,第一和第二误差线 耦合到浮动节点的电子隧道结构用于从浮动节点隧穿电子,以及耦合到浮动节点的电子注入结构,用于将电子注入到浮动节点上。 控制电路响应于第一输入和错误线上的信号,用于激活电子隧道结构,并且控制电路响应于第二输入和错误线上的信号,用于激活电子注入结构。 提供电路用于将信号驱动到第一和第二输入和错误线上。 还教导了包含连续加权更新装置的单一突触和突触阵列。

    Synaptic element including weight-storage and weight-adjustment circuit
    6.
    发明授权
    Synaptic element including weight-storage and weight-adjustment circuit 失效
    突触元素包括重量存储和重量调节电路

    公开(公告)号:US5204549A

    公开(公告)日:1993-04-20

    申请号:US827005

    申请日:1992-01-28

    IPC分类号: G06N3/063

    CPC分类号: G06N3/0635

    摘要: A weight-storage and weight-adjustment circuit includes a first hot electron injection device coupled to a first floating gate and a second hot electron injection device coupled to the second floating gate. The floating gates are associated with two series connected MOS transistors. The first and second hot electron injection devices comprise gated lateral bipolar transistors. The weight may be decreased by injecting hot electrons from the first hot electron injection device onto the first floating gate to decrease the first analog voltage and increased by injecting electrons from the second hot electron injection device onto the second floating gate to decrease the second analog voltage. Circuitry are provided to periodically adjust the absolute voltage levels on the first and second floating gates to prevent them from becoming too negative over time. First and second electron tunneling devices are coupled to the first and second floating gates, respectively, to simultaneously adjust the voltages stored on the floating gates to keep them within a desired voltage range.

    摘要翻译: 重量存储和重量调节电路包括耦合到第一浮动栅极的第一热电子注入装置和耦合到第二浮动栅极的第二热电子注入装置。 浮动栅极与两个串联的MOS晶体管相关联。 第一和第二热电子注入装置包括门控侧向双极晶体管。 可以通过将热电子从第一热电子注入装置注入到第一浮动栅极上来减小第一模拟电压并通过将电子从第二热电子注入装置注入到第二浮栅上来增加,从而减小第二模拟电压 。 提供电路以周期性地调整第一和第二浮动栅极上的绝对电压电平,以防止它们随时间变得太负。 第一和第二电子隧穿装置分别耦合到第一和第二浮动栅极,以同时调节存储在浮动栅极上的电压以将它们保持在期望的电压范围内。

    DEVELOPING IMPLICIT METADATA FOR DATA STORES
    8.
    发明申请
    DEVELOPING IMPLICIT METADATA FOR DATA STORES 审中-公开
    为数据存储开发隐含元数据

    公开(公告)号:US20130275434A1

    公开(公告)日:2013-10-17

    申请号:US13444482

    申请日:2012-04-11

    IPC分类号: G06F17/30

    摘要: A system enables metadata to be gathered about a data store beginning from the creation and generation of the data store, through subsequent use of the data store. This metadata can include keywords related to the data store and data appearing within the data store. Thus, keywords and other metadata can be generated without owner/creator intervention, with enough semantic meaning to make a discovery process associated with the data store much easier and efficient. Usage of or communication regarding a data store are monitored and keywords are extracted from the usage or communication. The keywords are then written to otherwise associated with metadata of the data store. During searching, keywords in the metadata are made available to be used to attempt to match query terms entered by a searcher.

    摘要翻译: 系统通过后续使用数据存储,可以从数据存储的创建和生成开始收集关于数据存储的元数据。 该元数据可以包括与数据存储相关的关键字和数据存储中出现的数据。 因此,关键字和其他元数据可以在没有所有者/创建者干预的情况下生成,具有足够的语义意义,使得与数据存储相关联的发现过程更容易和高效。 对数据存储的使用或通信进行监控,并从使用或通信中提取关键字。 然后将关键字写入与数据存储的元数据相关联。 在搜索期间,元数据中的关键字可用于尝试匹配搜索者输入的查询词。

    Learning Discriminative Projections for Text Similarity Measures
    10.
    发明申请
    Learning Discriminative Projections for Text Similarity Measures 审中-公开
    用于文本相似度量度的学习判别预测

    公开(公告)号:US20120323968A1

    公开(公告)日:2012-12-20

    申请号:US13160485

    申请日:2011-06-14

    IPC分类号: G06F17/30

    CPC分类号: G06F16/31

    摘要: A model for mapping the raw text representation of a text object to a vector space is disclosed. A function is defined for computing a similarity score given two output vectors. A loss function is defined for computing an error based on the similarity scores and the labels of pairs of vectors. The parameters of the model are tuned to minimize the loss function. The label of two vectors indicates a degree of similarity of the objects. The label may be a binary number or a real-valued number. The function for computing similarity scores may be a cosine, Jaccard, or differentiable function. The loss function may compare pairs of vectors to their labels. Each element of the output vector is a linear or non-linear function of the terms of an input vector. The text objects may be different types of documents and two different models may be trained concurrently.

    摘要翻译: 公开了将文本对象的原始文本表示映射到向量空间的模型。 定义了一个功能,用于计算给定两个输出向量的相似度得分。 定义了一种损失函数,用于计算基于相似度得分和向量对的标签的误差。 调整模型的参数以最小化损失函数。 两个向量的标签表示对象的相似度。 标签可以是二进制数字或实数值。 用于计算相似性分数的函数可以是余弦,Jaccard或可微分函数。 损失函数可以将向量对与其标签进行比较。 输出向量的每个元素是输入向量的项的线性或非线性函数。 文本对象可以是不同类型的文档,并且可以同时训练两个不同的模型。