公开(公告)号：US20220208631A1

公开(公告)日：2022-06-30

申请号：US17156626

申请日：2021-01-24

Applicant: Unimicron Technology Corp.

Inventor： Pu-Ju Lin ,  Kai-Ming Yang ,  Cheng-Ta Ko

IPC: H01L23/31 ,  H01L23/522 ,  H01L23/00 ,  H01L21/78 ,  H01L21/56

Abstract: A chip package structure including a chip, a stress buffer layer, a first insulating layer, a redistribution layer, a second insulating layer, and a solder ball is provided. The chip has an active surface, a back surface and a peripheral surface. The stress buffer layer covers the active surface and the peripheral surface, and the first insulating layer is disposed on the back surface. A bottom surface of the stress buffer layer is aligned with the back surface of the chip. The redistribution layer is electrically connected to the chip through an opening of the stress buffer layer. The second insulating layer covers the stress buffer layer and the redistribution layer. The solder ball is disposed in a blind hole of the second insulating layer and electrically connected to the redistribution layer. A top surface of the solder ball protrudes from an upper surface of the second insulating layer.

公开(公告)号：US20220059498A1

公开(公告)日：2022-02-24

申请号：US17098436

申请日：2020-11-15

Applicant: Unimicron Technology Corp.

Inventor： Tzyy-Jang Tseng ,  Pu-Ju Lin ,  Cheng-Ta Ko ,  Ra-Min Tain

IPC: H01L25/065 ,  H01L23/538 ,  H01L23/00 ,  H01L23/498 ,  H01L23/48

Abstract: A chip package structure includes a substrate, a first chip, a second chip, a bridge, a plurality of first bumps, a plurality of second bumps, a plurality of third bumps and a plurality of solder balls. A first active surface of the first chip and a second active surface of the second chip face a first surface of the substrate. The bridge includes a high-molecular polymer layer and a pad layer located on the high-molecular polymer layer. The first chip is electrically connected to the substrate through the first bumps. The second chip is electrically connected to the substrate through the second bumps. The first chip and the second chip are electrically connected to the pad layer through the third bumps. The first bumps and the second bumps have the same size. The solder balls are disposed on a second surface of the substrate and electrically connected to the substrate.

公开(公告)号：US20210247147A1

公开(公告)日：2021-08-12

申请号：US17168200

申请日：2021-02-05

Applicant: Unimicron Technology Corp.

Inventor： Ra-Min Tain ,  John Hon-Shing Lau ,  Pu-Ju Lin ,  Wei-Ci Ye ,  Chi-Hai Kuo ,  Cheng-Ta Ko ,  Tzyy-Jang Tseng

IPC: F28D15/04 ,  F28D15/02 ,  F28F21/08 ,  F28F3/10 ,  B23P15/26

Abstract: A vapor chamber structure including a thermally conductive shell, a capillary structure layer, and a working fluid is provided. The thermally conductive shell includes a first thermally conductive portion and a second thermally conductive portion. The first thermally conductive portion has at least one first cavity. The second thermally conductive portion and the first cavity define at least one sealed chamber, and a pressure in the sealed chamber is lower than a standard atmospheric pressure. The capillary structure layer covers an inner wall of the sealed chamber. The working fluid is filled in the sealed chamber.

公开(公告)号：US10897823B2

公开(公告)日：2021-01-19

申请号：US16361180

申请日：2019-03-21

Applicant: Unimicron Technology Corp.

Inventor： Tzyy-Jang Tseng ,  Cheng-Ta Ko ,  Kai-Ming Yang ,  Chih-Lun Wang

IPC: H05K1/18 ,  H05K1/09 ,  H05K1/11 ,  H05K1/02 ,  H05K3/42 ,  H05K3/00 ,  H05K3/46

Abstract: A circuit board including an interconnect substrate and a multilayer structure is provided. The interconnect substrate includes a core layer and a conductive structure disposed on the core layer. The multilayer structure is disposed on the conductive structure. The multilayer structure includes a plurality of dielectric layers and a plurality of circuit structures. The circuit structures are disposed in the dielectric layers. A topmost layer in the circuit structures is exposed to the dielectric layers to be in contact with the conductive structure. A pattern of the topmost layer in the circuit structures and a pattern of a top surface of the conductive structure are engaged with each other.

公开(公告)号：US10802637B1

公开(公告)日：2020-10-13

申请号：US16509462

申请日：2019-07-11

Applicant: Unimicron Technology Corp.

Inventor： Tse-Wei Wang ,  Cheng-Ta Ko

IPC: G06F3/041 ,  H01L33/52 ,  H01L33/50 ,  H01L33/62

Abstract: A touch-sensing display panel includes a substrate, a first circuit layer, a LED chip, a second circuit layer, a blocking wall, a second wire, and a third wire. The first circuit layer is on the substrate, including at least one first electrode, and a first wire. The LED chip is on and electrically connected to the first electrode. The second circuit layer is on the first circuit layer, including a second electrode, a touch sensing line, and a touch driving line. The blocking wall, the second wire, and the third wire are on the second circuit layer. The second wire extends to an inner sidewall and a top surface of the blocking wall, and electrically connects to the touch sensing line. The third wire extends to an outer sidewall of the blocking wall, and electrically connects to the touch driving line.

公开(公告)号：US10756050B2

公开(公告)日：2020-08-25

申请号：US16152424

申请日：2018-10-05

Applicant: Unimicron Technology Corp.

Inventor： Tzyy-Jang Tseng ,  Cheng-Ta Ko ,  Kai-Ming Yang ,  Yu-Hua Chen

IPC: H01L29/40 ,  H01L23/00 ,  H01L21/48 ,  H01L23/498

Abstract: A package structure includes a first substrate, a second substrate, a plurality of conductive pillars and an adhesive layer. The first substrate includes a plurality of vias and a plurality of pads. The pads are disposed on the first substrate, and fill the vias. The second substrate is disposed opposite to the first substrate. Each conductive pillar electrically connects each pad and the second substrate, and the adhesive layer fills the gaps between the conductive pillars. A bonding method of the package structure is also provided.