公开(公告)号：US08604767B2

公开(公告)日：2013-12-10

申请号：US12848480

申请日：2010-08-02

Applicant: Jing-Meng Liu

Inventor： Jing-Meng Liu

IPC: G05F1/575 ,  G05F1/618

CPC classification number: H02M3/156

Abstract: A boundary conduction mode (BCM) switching regulator controls a power stage to convert an input voltage to an output voltage or output current. The BCM switching regulator detects whether it is operating in continuous conduction mode (CCM) or discontinuous conduction mode (DCM), and adjusts the On-time, Off-time, or frequency of the power stage accordingly, so that the switching regulator operates in or near BCM.

公开(公告)号：US20130313641A1

公开(公告)日：2013-11-28

申请号：US13480360

申请日：2012-05-24

Applicant: Tsung-Yi Huang ,  Chien-Wei Chiu ,  Chien-Hao Huang

Inventor： Tsung-Yi Huang ,  Chien-Wei Chiu ,  Chien-Hao Huang

IPC: H01L29/78

CPC classification number: H01L29/7816 ,  H01L29/0696 ,  H01L29/0878 ,  H01L29/1083 ,  H01L29/1095 ,  H01L29/42368 ,  H01L29/42372 ,  H01L29/42376 ,  H01L29/4238 ,  H01L29/66681

Abstract: The present invention discloses a double diffused metal oxide semiconductor (DMOS) device. The DMOS device is formed in a substrate, and includes a high voltage well, a first field oxide region, a first gate, a first source, a drain, a body region, a body electrode, a second field oxide region, a second gate, and a second source. The second field oxide region and the first field oxide region are separated by the high voltage well and the body region. A part of the second gate is on the second field oxide region, and another part of the second gate is on the body region. The second gate is electrically connected to the first gate, and the second source is electrically connected to the first source, such that when the DMOS device is ON, a surface channel and a buried channel are formed.

Abstract translation: 本发明公开了一种双扩散金属氧化物半导体（DMOS）装置。 DMOS器件形成在衬底中，并且包括高电压阱，第一场氧化物区域，第一栅极，第一源极，漏极，体区域，体电极，第二场氧化物区域，第二栅极 ，和第二个来源。 第二场氧化物区域和第一场氧化物区域被高电压井和身体区域分开。 第二栅极的一部分在第二场氧化物区域上，第二栅极的另一部分位于主体区域上。 第二栅极电连接到第一栅极，并且第二源极电连接到第一源极，使得当DMOS器件导通时，形成表面沟道和埋入沟道。

公开(公告)号：US08501567B2

公开(公告)日：2013-08-06

申请号：US13317568

申请日：2011-10-21

Applicant: Tsung-Yi Huang ,  Yuh-Chyuan Wang

Inventor： Tsung-Yi Huang ,  Yuh-Chyuan Wang

IPC: H01L21/8234

CPC classification number: H01L29/66659 ,  H01L21/266 ,  H01L21/82385 ,  H01L21/823857 ,  H01L27/0922 ,  H01L29/0847 ,  H01L29/1083 ,  H01L29/7835

Abstract: The present invention discloses a manufacturing method of a high voltage device. The high voltage device is formed in a first conductive type substrate. The high-voltage device includes: a second conductive type buried layer; a first conductive type high voltage well; and a second conductive type body. The high voltage well is formed by the same step for forming a first conductive type well or a first conductive type channel stop layer of a low voltage device formed in the same substrate. The body is formed by the same step for forming a second conductive type well of the low voltage device.

公开(公告)号：US20130128395A1

公开(公告)日：2013-05-23

申请号：US13370561

申请日：2012-02-10

Applicant: Kuo-Chen Tsai ,  Wei-Lun Hsieh ,  Tung-Han Tsai ,  Ming-Jun Hsiao

Inventor： Kuo-Chen Tsai ,  Wei-Lun Hsieh ,  Tung-Han Tsai ,  Ming-Jun Hsiao

IPC: H02H3/08

CPC classification number: H02H3/24

Abstract: The present invention discloses a short-circuit detection circuit and a short-circuit detection method. The short-circuit detection circuit detects whether an output node is short-circuited to a first predetermined level. A first switch circuit which is controlled by a control signal is coupled between the output node and a second predetermined level. The short-circuit detection circuit includes: a determination circuit, which is coupled between the output node and the second predetermined level, wherein when the determination circuit is enabled, it generates a determination signal according to whether the output node is short-circuited to the first predetermined level; and a second switch circuit, which generates a short-circuit detection signal according to the determination signal.

Abstract translation: 本发明公开了一种短路检测电路和短路检测方法。 短路检测电路检测输出节点是否短路到第一预定电平。 由控制信号控制的第一开关电路耦合在输出节点和第二预定电平之间。 短路检测电路包括：确定电路，其耦合在输出节点和第二预定电平之间，其中当确定电路被使能时，其根据输出节点是否短路到产生确定信号 第一预定水平; 以及第二开关电路，其根据确定信号产生短路检测信号。

公开(公告)号：US20130093011A1

公开(公告)日：2013-04-18

申请号：US13276111

申请日：2011-10-18

Applicant: Tsung-Yi Huang ,  Chien-Wei Chiu

Inventor： Tsung-Yi Huang ,  Chien-Wei Chiu

IPC: H01L29/78 ,  H01L21/336

CPC classification number: H01L29/66681 ,  H01L29/0623 ,  H01L29/1083 ,  H01L29/66659 ,  H01L29/7813 ,  H01L29/7835

Abstract: The present invention discloses a high voltage device and a manufacturing method thereof. The high voltage device is formed in a substrate. The high voltage device includes: a gate, a source and drain, a drift region, and a mitigation region. The gate is formed on an upper surface of the substrate. The source and drain are located at both sides of the gate below the upper surface respectively, and the source and drain are separated by the gate. The drift region is located at least between the gate and the drain. The mitigation region is formed below the drift region, and the drift region has an edge closer to the source. A vertical distance between this edge of the drift region and the mitigation region is less than or equal to five times of a depth of the drift region.

Abstract translation: 本发明公开了一种高压器件及其制造方法。 高压器件形成在衬底中。 高电压装置包括：栅极，源极和漏极，漂移区和缓解区。 栅极形成在衬底的上表面上。 源极和漏极分别位于栅极下方的两侧，源极和漏极由栅极分开。 漂移区域至少位于栅极和漏极之间。 缓冲区形成在漂移区下方，漂移区具有靠近源的边。 漂移区域的这个边缘与缓解区域之间的垂直距离小于或等于漂移区域的深度的五倍。

公开(公告)号：US20130070379A1

公开(公告)日：2013-03-21

申请号：US13239362

申请日：2011-09-21

Applicant: Jiun-Hung Pan ,  Chien-Fu Tang ,  Isaac Y. Chen

Inventor： Jiun-Hung Pan ,  Chien-Fu Tang ,  Isaac Y. Chen

IPC: H02H3/093

CPC classification number: H02H3/093 ,  H02H3/006

Abstract: The present invention discloses a power regulator with over current protection (OCP), a control circuit thereof, and a method of over current protection. The power regulator with OCP includes: a primary circuit, a transformer, and a secondary circuit. The power regulator receives AC power, and generates secondary current which is supplied to a load circuit. The primary circuit includes a control circuit which includes: a switch control circuit, a first comparator circuit, a sample and hold circuit, and a compensation circuit which is coupled to the sample and hold circuit. The compensation circuit adaptively adjusts a threshold level of the OCP according to a current sense signal, or controls a delay time of an over current detection signal to compensate an error of the OCP threshold level, which is caused by the AC power, such that the primary current may have a peak corresponding to a predetermined setting.

Abstract translation: 本发明公开了一种具有过电流保护功能的调节器（OCP）及其控制电路及过流保护方法。 带有OCP的电源调节器包括：初级电路，变压器和次级电路。 功率调节器接收交流电力，产生供给负载电路的二次电流。 主电路包括控制电路，其包括：开关控制电路，第一比较器电路，采样保持电路和耦合到采样和保持电路的补偿电路。 补偿电路根据电流检测信号自适应地调整OCP的阈值电平，或者控制过电流检测信号的延迟时间，以补偿由AC电源引起的OCP阈值电平的误差，使得 初级电流可以具有对应于预定设置的峰值。

公开(公告)号：US20130057237A1

公开(公告)日：2013-03-07

申请号：US13226145

申请日：2011-09-06

Applicant: An-Tung Chen ,  Yuan-Wen Hsiao ,  Yi-Cheng Wan

Inventor： An-Tung Chen ,  Yuan-Wen Hsiao ,  Yi-Cheng Wan

IPC: G05F1/00 ,  G05F1/10

CPC classification number: H02M3/1584 ,  H02M2001/0003

Abstract: The present invention discloses a multi-phase switching regulator and a droop circuit therefor. The droop circuit includes: multiple first resistors, which are coupled to corresponding phase nodes respectively to sense current through the phase nodes; a second resistor, which is coupled to the multiple first resistors; an error amplifier circuit, which has an inverting input end and a non-inverting input end, wherein the inverting input end is coupled to the second resistor and an output end of the error amplifier circuit, and the non-inverting input end is coupled to an output node; and a droop capacitor, which is coupled between the second resistor and the output node; wherein the droop circuit provides the droop signal according to a voltage drop across the second resistor or current through the second resistor.

Abstract translation: 本发明公开了一种多相开关调节器及其下垂电路。 下垂电路包括：多个第一电阻器，其分别耦合到对应的相位节点以感测通过相位节点的电流; 第二电阻器，其耦合到所述多个第一电阻器; 误差放大器电路，其具有反相输入端和非反相输入端，其中反相输入端耦合到第二电阻器和误差放大器电路的输出端，并且非反相输入端耦合到 输出节点; 以及下降电容器，其耦合在所述第二电阻器和所述输出节点之间; 其中所述下降电路根据所述第二电阻器上的电压降或通过所述第二电阻器的电流来提供所述下降信号。

公开(公告)号：US20130049721A1

公开(公告)日：2013-02-28

申请号：US13538384

申请日：2012-06-29

Applicant: CHIEH-MIN LO ,  Tzu-Huan Chiu

Inventor： CHIEH-MIN LO ,  Tzu-Huan Chiu

IPC: G05F1/10

CPC classification number: G05F1/575

Abstract: The present invention discloses a linear regulator and a control circuit therefor. The linear regulator includes: a power device coupled between an input voltage and an output voltage; a first error amplifier including a depletion NMOS differential circuit comparing a feedback signal related to the output voltage with a reference signal; a second error amplifier including a native NMOS differential circuit comparing the feedback signal with the reference signal; and a start-up circuit which enables the first error amplifier to dominate control and drive the power device when the linear regulator is at a first stage of a start-up period and enables the second error amplifier to dominate control and drive the power device when the linear regulator is at a second stage after the first stage.

Abstract translation: 本发明公开了一种线性调节器及其控制电路。 线性调节器包括：耦合在输入电压和输出电压之间的功率器件; 第一误差放大器，包括将与输出电压相关的反馈信号与参考信号进行比较的耗尽NMOS差分电路; 第二误差放大器，包括将反馈信号与参考信号进行比较的天然NMOS差分电路; 以及启动电路，其使得当线性调节器处于启动周期的第一阶段时，能够使第一误差放大器控制和驱动功率器件，并使得第二误差放大器能够主导控制并驱动功率器件，当 线性调节器处于第一阶段之后的第二阶段。

公开(公告)号：US20130002226A1

公开(公告)日：2013-01-03

申请号：US13200162

申请日：2011-09-20

Applicant: Jo-Yu Wang ,  Wei-Jhih Wen

Inventor： Jo-Yu Wang ,  Wei-Jhih Wen

IPC: G05F3/02

CPC classification number: H02M1/36 ,  H02M3/156 ,  H02M3/158

Abstract: The present invention discloses a switching regulator including: a power stage having an upper gate device and a lower gate device coupled with each other, for converting an input voltage to an output voltage and generating a phase voltage at a node between the upper gate device and the lower gate device; and a control circuit including: a switch operation circuit controlling the power stage, the switch operation circuit generating a test signal turning on the upper gate device for a period of time and then turning it off; and a comparator for generating a ready signal indicating that the input voltage is ready according to comparison between the phase voltage and a reference voltage after the upper gate device is turned off.

公开(公告)号：US08248000B2

公开(公告)日：2012-08-21

申请号：US12787574

申请日：2010-05-26

Applicant: Jing-Meng Liu

Inventor： Jing-Meng Liu

IPC: H05B37/02

CPC classification number: H05B33/0827 ,  H05B33/0815

Abstract: The present invention discloses a light emitting device array controller which controls a power stage to supply an output voltage to one end of each of a plurality of light emitting device strings. The other end of each of the light emitting device strings is coupled to a corresponding transistor having a current inflow end, a current outflow end and a control end. The present invention obtains signals from the control ends of the transistors instead of the current inflow ends, and feedback controls the output voltage according to the highest voltage of the control ends. Thus, the number of pins required for a circuit chip is reduced.

Abstract translation: 本发明公开了一种发光器件阵列控制器，其控制功率级以将输出电压提供给多个发光器件串中的每一个的一端。 每个发光器件串的另一端耦合到具有电流流入端，电流流出端和控制端的相应晶体管。 本发明从晶体管的控制端而不是电流流入端获得信号，反馈根据控制端的最高电压来控制输出电压。 因此，减少了电路芯片所需的引脚数。