公开(公告)号：US08130110B2

公开(公告)日：2012-03-06

申请号：US12360245

申请日：2009-01-27

Applicant: Morgan H. Monks ,  David E. Haglan

Inventor： Morgan H. Monks ,  David E. Haglan

IPC: G08B21/00

CPC classification number: H04M1/72527 ,  H04M1/72572 ,  H04M2250/10

Abstract: Reporting a faulty charging device. A mobile device may determine if a charging device is a faulty charging device. The determination may be performed after coupling the charging device to a power source and to the mobile device. If the charging device is a faulty charging device, the mobile device may report a location of the faulty charging device over a network.

Abstract translation: 报告故障充电设备。 移动设备可以确定充电设备是否是故障充电设备。 可以在将充电装置耦合到电源和移动装置之后执行确定。 如果充电设备是有故障的充电设备，则移动设备可以通过网络报告故障充电设备的位置。

公开(公告)号：US08103174B2

公开(公告)日：2012-01-24

申请号：US12961668

申请日：2010-12-07

Applicant: David J. Knapp ,  Tony Susanto ,  Edmund M. Schneider ,  Wesley L. Mokry

Inventor： David J. Knapp ,  Tony Susanto ,  Edmund M. Schneider ,  Wesley L. Mokry

IPC: H04B10/12

CPC classification number: H04B10/40

Abstract: A communication network is provided for interconnecting a network of digital systems, such as multimedia devices. Each node of the communication network may include a receiver and a transmitter. The receiver and transmitter of each node can be an optical receiver and transmitter. The optical receiver is preferably powered by two power supply pins, each providing different supply amounts. An activity detector within the receiver can be powered from a first supply amount, and the signal path of the optical receiver can be supplied from a second supply amount greater than the first supply amount. The first supply amount is provided at all times, and the second supply amount is only provided if activity is detected. A voltage regulator which provides the first supply amount can be beneficially embodied on the same integrated circuit as a network interface to reduce the manufacturing cost of the network. By powering the activity detector separate from the signal path, power down and power up (normal) operating states are envisioned for reducing power consumption and increasing longevity of the optical receiver and transmitter.

Abstract translation: 提供通信网络用于互连诸如多媒体设备的数字系统的网络。 通信网络的每个节点可以包括接收机和发射机。 每个节点的接收机和发射机可以是光接收机和发射机。 光接收器优选由两个电源引脚供电，每个电源引脚提供不同的供电量。 接收机内的活动检测器可以从第一供给量供电，并且可以从大于第一供给量的第二供应量提供光接收器的信号路径。 始终提供第一供给量，仅在检测到活动时提供第二供给量。 提供第一供给量的电压调节器可以有益地实现在与网络接口相同的集成电路上，以降低网络的制造成本。 通过为活动检测器与信号路径分开供电，设想掉电和上电（正常）运行状态，以降低功耗并延长光接收器和发射器的使用寿命。

公开(公告)号：US07917741B2

公开(公告)日：2011-03-29

申请号：US11733599

申请日：2007-04-10

Applicant: Drew J. Dutton ,  Alan D. Berenbaum ,  Richard E. Wahler ,  Raphael Weiss

Inventor： Drew J. Dutton ,  Alan D. Berenbaum ,  Richard E. Wahler ,  Raphael Weiss

IPC: G06F9/00 ,  G06F15/177 ,  G06F1/24 ,  G06F21/00 ,  G06F12/14 ,  G06F7/04 ,  G06F17/30 ,  G08B29/00

CPC classification number: G06F21/575

Abstract: System and method for performing pre-boot security verification in a system that includes a host processor and memory, an embedded microcontroller with an auxiliary memory, e.g., an on-chip ROM, or memory controlled to prohibit user-tampering with the contents of the memory, and one or more pre-boot security components coupled to the embedded microcontroller. Upon power-up, but before host processor boot-up, the embedded microcontroller accesses the auxiliary memory and executes the program instructions to verify system security using the one or more pre-boot security components. The one or more pre-boot security components includes at least one identity verification component, e.g., a smart card, or a biometric sensor, e.g., a fingerprint sensor, a retinal scanner, and/or a voiceprint sensor, etc., and/or at least one system verification component, e.g., TPM, to query the system for system state information, and verify that the system has not been compromised.

Abstract translation: 用于在包括主处理器和存储器的系统中执行预引导安全验证的系统和方法，具有辅助存储器的嵌入式微控制器，例如片上ROM或被控制以禁止用户篡改内容的内存的存储器 存储器以及耦合到嵌入式微控制器的一个或多个预引导安全组件。 上电后，但在主机处理器启动之前，嵌入式微控制器访问辅助存储器并执行程序指令，以使用一个或多个预引导安全组件来验证系统的安全性。 一个或多个预引导安全组件包括至少一个身份验证组件，例如智能卡或生物测定传感器，例如指纹传感器，视网膜扫描器和/或声纹印刷传感器等，和/ 或至少一个系统验证组件（例如TPM）来查询系统的系统状态信息，并验证系统是否未被泄露。

公开(公告)号：US07917716B2

公开(公告)日：2011-03-29

申请号：US11848808

申请日：2007-08-31

Applicant: Alan D. Berenbaum ,  Raphael Weiss

Inventor： Alan D. Berenbaum ,  Raphael Weiss

IPC: G06F12/14 ,  G06F9/24

CPC classification number: G06F12/1441

Abstract: System and method for protecting data in a system including a main processor, an embedded controller, and a memory. In response to a power-on-reset (POR), access to the memory is enabled, e.g., access by the embedded controller. First data is read from the memory (e.g., by the embedded controller) in response to the enabling, where the first data are usable to perform security operations for the system prior to boot-up of the main processor. The first data are used, e.g., by the embedded controller, to perform one or more security operations for the system, then access to the memory, e.g., by the embedded controller, is disabled, where after the disabling the memory is not accessible, e.g., until the next POR initiates enablement.

Abstract translation: 用于在包括主处理器，嵌入式控制器和存储器的系统中保护数据的系统和方法。 响应于上电复位（POR），启用对存储器的访问，例如，嵌入式控制器的访问。 响应于启用，第一数据从存储器（例如，由嵌入式控制器）读取，其中第一数据可用于在主处理器启动之前对系统执行安全操作。 例如，嵌入式控制器使用第一数据来对系统执行一个或多个安全操作，则例如由嵌入式控制器访问存储器被禁用，在禁止存储器不可访问之后， 例如，直到下一个POR启动启用。

公开(公告)号：US07893670B2

公开(公告)日：2011-02-22

申请号：US12389581

申请日：2009-02-20

Applicant: Srinivas K. Pulijala ,  Scott C. McLeod

Inventor： Srinivas K. Pulijala ,  Scott C. McLeod

IPC: G05F1/00

CPC classification number: G05F1/575

Abstract: A voltage regulator may comprise a regulator output configured to provide a regulated voltage, which may be controlled by an error amplifier based on the regulated voltage and a reference voltage. The error amplifier may control a source-follower stage to mirror a multiple of the current flowing in the source-follower stage into an internal pass device. A voltage developed by the mirror current may control an external pass device configured to deliver the load current into the regulator output. A first resistor may be configured to decouple a load capacitor coupled between the regulator output and reference ground, when the load current is below a specified value. A second resistor may be configured to create a bias current in the internal pass device even when the external pass device is close to cut-off region. A third resistor may be configured to counter the effects of negative impedance at the control terminal of the external pass device caused by the current-gain of the external pass device. A compensation capacitor and resistor may be coupled in series between the output of the error amplifier and the output of the voltage regulator to provide frequency compensation for the Miller-Effect.

Abstract translation: 电压调节器可以包括被配置为提供调节电压的调节器输出，其可以由基于调节电压和参考电压的误差放大器控制。 误差放大器可以控制源极跟随器级将在源极跟随器级中流动的电流的倍数镜像成内部通过器件。 由反射镜电流产生的电压可以控制配置成将负载电流传递到调节器输出中的外部通过装置。 当负载电流低于规定值时，第一电阻器可以被配置为去耦耦合在调节器输出端和参考地之间的负载电容器。 第二电阻器可以被配置为在内部通路器件中产生偏置电流，即使当外部通过器件接近截止区域时。 第三电阻器可以被配置为对抗由外部通过器件的电流增益引起的外部通过器件的控制端子处的负阻抗的影响。 补偿电容器和电阻器可以串联耦合在误差放大器的输出端和电压调节器的输出端之间，为米勒效应提供频率补偿。

公开(公告)号：US07816897B2

公开(公告)日：2010-10-19

申请号：US11373390

申请日：2006-03-10

Applicant: Paul F. Illegems

Inventor： Paul F. Illegems

IPC: G05F1/573

CPC classification number: G05F3/262

Abstract: An electronic circuit. The electronic circuit includes a pass transistor having a channel coupled between an input node and an output node. An error circuit is coupled thereto and configured to control the amount of current flowing through the pass transistor. The electronic circuit may further include a feedback node. A current limiting circuit is coupled to both the feedback node and the error circuit. The current limiting circuit is configured to limit an amount of current provided to the pass transistor by the error circuit based on a on a feedback voltage present on the feedback node and a current through a current mirror circuit, and therefore limits the output current provided by the electronic circuit.

Abstract translation: 电子电路。 电子电路包括传输晶体管，其具有耦合在输入节点和输出节点之间的信道。 误差电路耦合到其上并被配置为控制流过传输晶体管的电流量。 电子电路还可以包括反馈节点。 限流电路耦合到反馈节点和误差电路。 电流限制电路被配置为基于反馈节点上存在的反馈电压和通过电流镜电路的电流来限制由误差电路提供给传输晶体管的电流量，并且因此限制由 电子电路。

公开(公告)号：US07801159B2

公开(公告)日：2010-09-21

申请号：US11961086

申请日：2007-12-20

Applicant: David J. Knapp ,  Patrick Heck

Inventor： David J. Knapp ,  Patrick Heck

IPC: H04L12/28

CPC classification number: H04J3/1682 ,  H04J3/0638 ,  H04J3/12

Abstract: A communication system, network interface, and communication port is provided for interconnecting a network of multimedia devices. The multimedia devices can send streaming and/or non-streaming data across the network. The network accommodates all such types of data and assigns data types to time slots or frame segments within each frame to ensure streaming data maintains its temporal relationship at the receiver consistent with the transmitter. A signaling byte is preferably used to keep track of an amount by which isochronous streaming data occupies a frame segment.

公开(公告)号：US07796067B2

公开(公告)日：2010-09-14

申请号：US12317314

申请日：2008-12-22

Applicant: Derrick Tuten

Inventor： Derrick Tuten

IPC: H03M1/06

CPC classification number: H03M1/1042 ,  G01K7/01 ,  G01K2219/00 ,  H03M1/12

Abstract: A method is provided to produce an error corrected digital output from a temperature measurement system that generates digital outputs representative of the output of one or more temperature sensors. In an embodiment of the invention the method comprises: storing in a plurality of memory locations corresponding error correction data, with each memory location having a correlation to a corresponding range of the digital outputs; utilizing each digital output to identify a corresponding one of the memory locations; accessing the corresponding one memory location to obtain error correction data specific to the digital output; and utilizing the error correction data specific to the digital output to correct the digital output, whereby an error corrected digital output is generated.

Abstract translation: 提供了一种从温度测量系统产生纠错数字输出的方法，该系统产生代表一个或多个温度传感器的输出的数字输出。 在本发明的一个实施例中，该方法包括：存储在多个存储单元中对应的纠错数据，其中每个存储器位置与数字输出的对应范围具有相关性; 利用每个数字输出来识别对应的一个存储器位置; 访问相应的一个存储器位置以获得特定于数字输出的纠错数据; 利用特定于数字输出的纠错数据来校正数字输出，由此产生纠错数字输出。

公开(公告)号：US07742265B2

公开(公告)日：2010-06-22

申请号：US11145903

申请日：2005-06-06

Applicant: David R. Rice

Inventor： David R. Rice

IPC: H02H9/00

CPC classification number: H01L27/0266

Abstract: In one embodiment, an ESD protection circuit comprises a switchable current sinking circuit connected to a positive ESD clamp rail voltage, which may be a power supply voltage, and a single trigger control circuit coupled to a control connection of the switchable current sinking circuit. The single trigger control circuit may be configured to couple the control connection of the switchable current sinking circuit to a negative ESD clamp rail voltage, which may be signal ground, during an ESD event occurring on the positive ESD clamp rail connection. In one embodiment, the switchable current sinking circuit is capable of sinking large amounts of current, and the ESD protection circuit is tolerant of rail voltages that exceed the breakdown voltage of semiconductor devices used in constructing the ESD circuit. In one embodiment, the single trigger control circuit is implemented with a single n-well, thereby minimizing the amount of required silicon area during fabrication of the ESD protection circuit.

Abstract translation: 在一个实施例中，ESD保护电路包括连接到正ESD钳位电压的可切换电流吸收电路，其可以是电源电压，以及耦合到可切换电流吸收电路的控制连接的单个触发控制电路。 单个触发控制电路可以被配置为在ESD ESD钳位导轨连接处发生ESD事件期间将可切换电流吸收电路的控制连接耦合到可能被信号接地的负ESD钳位电压。 在一个实施例中，可切换电流吸收电路能够吸收大量的电流，并且ESD保护电路容许超过用于构建ESD电路的半导体器件的击穿电压的轨电压。 在一个实施例中，单个触发控制电路由单个n阱实现，由此在ESD保护电路的制造期间最小化所需的硅面积的量。

公开(公告)号：US07509439B2

公开(公告)日：2009-03-24

申请号：US11044446

申请日：2005-01-27

Applicant: Morgan Monks ,  Bing Yup

Inventor： Morgan Monks ,  Bing Yup

IPC: G06F3/00 ,  G06F13/28 ,  G06F12/00

CPC classification number: G06F13/4286

Abstract: A system and method for protecting register write operations, especially register write operations performed in a USB PHY. A USB transmitter/receiver, operable to receive a register write command from a USB LINK device, may monitor the write sequence initiated by the register write command to determine if/when the register write sequence has been interrupted. In monitoring the register write sequence, the USB transmitter/receiver is operable to discard the register write command if a DIR signal issued by the USB transmitter/receiver is asserted during the register write sequence and/or if an STP signal received by the USB transmitter/receiver is asserted during the register write sequence, where STP may be part of a normal register write operation. The USB transmitter/receiver is further operable to allow the register write sequence to complete if the STP signal and the DIR signal are not asserted during a predetermined period of the register write sequence. The monitoring functions may be implemented in a finite state machine comprised in the USB transmitter/receiver.

Abstract translation: 一种用于保护寄存器写入操作的系统和方法，特别是在USB PHY中执行的寄存器写入操作。 用于从USB LINK设备接收寄存器写入命令的USB发送器/接收器可以监视由寄存器写入命令发起的写入序列，以确定寄存器写入序列是否被中断。 在监视寄存器写入顺序时，如果在寄存器写入序列期间断言由USB发送器/接收器发出的DIR信号和/或由USB发送器接收到的STP信号，USB发送器/接收器可以丢弃寄存器写入命令 /接收器在寄存器写入序列期间被断言，其中STP可以是正常寄存器写入操作的一部分。 如果在寄存器写入序列的预定周期期间STP信号和DIR信号不被断言，则USB发送器/接收器还可操作以允许寄存器写入序列完成。 监视功能可以在包含在USB发送器/接收器中的有限状态机中实现。