Abstract:
A driving device and a driving method of a flat panel display are provided. The driving device includes a driving circuit, an output buffer and a buffer control module. The driving circuit outputs a pixel data during a valid data period, and an input terminal of the output buffer receives the output of the driving circuit. The buffer control module turns off the output buffer during a blanking data period, and turns on the output buffer during the valid data period in order to reduce power consumption of the output buffer, and maintain an image quality of the flat panel display.
Abstract:
A touch-sensing panel including a substrate, a plurality of first electrode series, a plurality of second electrode series, and a plurality of first floating patterns is provided. Each of the first electrode series includes a plurality of first touch-sensing pads and a plurality of first bridge patterns. The second electrode series are disposed on the substrate and electrically insulated from each other. The second sensing series are intersected with and electrically insulated from the first sensing series. Each of the second electrode series includes a plurality of second touch-sensing pads and a plurality of second bridge patterns. The first floating patterns are disposed between the first sensing series and the second sensing series. Each of the first touch-sensing pads includes at least one extending portion. In addition, there is no first floating pattern located between the extending portion and the second electrode series adjacent thereto.
Abstract:
A source driver with an automatic de-skew capability is configured to receive a data signal and a clock signal from a timing controller, which are configured to drive a liquid crystal display panel. The source driver includes a signal delay unit, a setup time register, a hold time register, a first signal delay unit, a second delay unit and a logic circuit. In one embodiment of the present disclosure, the first data delay signal is configured to sample the second clock delay signal and the second data delay signal is configured to sample the first clock delay signal.
Abstract:
A chip package includes: a substrate having a first and a second surface; a device region and a pad disposed on the first surface; a hole extending from the second surface to the pad; an insulating layer located on a sidewall of the hole; a carrier substrate located on the second surface; a first redistribution layer located between the carrier substrate and the insulating layer and located in the hole to electrically contact with the pad, wherein an edge of the first redistribution layer is exposed on a sidewall formed by the carrier substrate and the insulating layer; a second redistribution layer located on the carrier substrate, extending towards the second surface, and contacting the exposed edge of the first redistribution layer; and a buffer layer located on or below the second surface of the substrate and located between the second redistribution layer and the substrate.
Abstract:
A source driver includes a receiver for receiving a digital signal at an input node to generate a received signal at an output node, and the receiver includes a first switch, a second switch, a voltage-limiting circuit and a channel. The first switch is utilized for selectively connecting the output node of the receiver to a first reference voltage based on the digital signal. The second switch is utilized for selectively connecting the output node of the receiver to a second reference voltage based on the digital signal. The voltage-limiting circuit is coupled between the input node and the output node of the receiver, and is utilized for limiting a voltage level of the input node of the receiver. The channel is utilized for generating a driving voltage based on the received signal.
Abstract:
A frame maintaining circuit including a detection circuit and a display control circuit is provided. The detection circuit detects an unusual status to output a status feedback signal. The display control circuit maintains a frame displayed by a display apparatus according to the status feedback signal until the unusual status ceases.
Abstract:
A source driver includes a receiver for receiving a digital signal at an input node to generate an output signal at an output node, where the receiver includes a first switch, a second switch, a voltage-limiting circuit, a third switch and a channel. The first switch is for selectively connecting the output node of the receiver to a first reference voltage based on the digital signal. The second switch is for selectively connecting the output node of the receiver to a second reference voltage based on the digital signal. The voltage-limiting circuit is coupled between the input node and the output node of the receiver, and is for limiting a voltage level of the input node of the receiver. The third switch is coupled between the voltage-limiting circuit and the output node of the receiver. The channel is for generating a driving voltage based on the output signal.
Abstract:
A light source apparatus and a light source adjusting module are provided. The light source apparatus includes a power supply, a phase modulator, an electrical transformer, a light source adjusting module and a light-emitting device. The power supply provides a first AC voltage signal. The phase modulator receives the first AC voltage signal and adjusts a conducting phase of the first AC voltage signal to generate a modulated AC voltage signal. The electrical transformer transforms the modulated AC voltage signal to generate a second AC voltage signal. The light adjusting module generates a luminance adjusting signal according to a state of the second AC voltage signal. The light-emitting device receives the luminance adjusting signal to generate a corresponding light source.
Abstract:
An operational amplifier capable of compensating offset voltage includes an input stage circuit having a positive input end, a negative input end, a first current output end, and a second current output end, for outputting current corresponding to voltage received by the positive and negative input ends, an output stage circuit coupled to the first current output end and the second current output end of the input stage circuit, for outputting voltage according to current outputted from the first current output end and the second current output end, and an trimming device coupled between the input stage circuit and the output stage circuit, for adjusting current of the first current output end or the second current output end for compensating offset voltage.
Abstract:
A light adjusting device for a light emitting diode includes a switch, a detecting unit and an illumination adjusting unit. The switch is coupled to a power terminal, which is utilized for providing power for the light emitting diode. The detecting unit is coupled to the switch, and is utilized for determining a status of the switch, so as to generate a detecting result. The illumination adjusting unit is coupled to the detecting unit, and is utilized for adjusting illumination of the light emitting diode according to the detecting result.