Abstract:
A semiconductor wafer processing system for processing wafers from a wafer storage cassette includes a wafer transfer chamber; a wafer storage elevator within the transfer chamber; one or more wafer processing chambers; and a wafer transfer apparatus for transferring a wafer between a standard storage cassette adjacent and outside the transfer chamber and the elevator, and between the elevator and the processing chamber. The storage chamber pressure varies between atmospheric when accepting wafers from outside, and a subatmospheric pressure when transferring wafers to or from a processing chamber. The transfer apparatus includes a robot arm; a thin flat wafer carrying blade at the leading end of the robot arm configured for engaging a wafer from the storage cassette or the elevator; and a wafer support tray configured for removable engagement with the blade and for engaging and positively positioning a wafer from the elevator, or a support pedestal within a processing chamber. When the transfer apparatus moves a wafer between the elevator and a processing chamber in an evacuated environment, the tray is engaged with the blade and helps retain the wafer during transit. When wafers are transferred between the cassette and the elevator at atmospheric pressure the tray is disengaged from the blade and placed in a rest position on the elevator, and the wafer transfer is performed by means of the blade alone with a vacuum pick integral to the blade. The blade includes upper and lower halves together defining vacuum channels and capacitive position sensors.
Abstract:
An improved process is described for forming planar tungsten-filled contacts to a silicon substrate in contact openings through an insulating layer which provides for the formation of titanium silicide in and on the silicon surface at the bottom of the contact openings to provide low resistance silicide interconnections between the silicon substrate and the tungsten. A titanium nitride layer is formed over the titanium silicide and on the surfaces of the insulation layer, including the top surface of the insulation layer and the sidewall surfaces of the contact openings through the insulating layer. This titanium nitride layer provides a nucleation layer which permits a good bond to form from the tungsten through the titanium nitride and titanium silicide in the contact openings to the silicon substrate; and from the tungsten through the titanium nitride layer to the insulator material such as silicon dioxide (SO.sub.2), resulting in the formation of low resistance and low defect density contacts.
Abstract:
An improved process is described for forming planar tungsten-filled contacts to a silicon substrate in contact openings through an insulating layer which provides for the formation of titanium silicide in and on the silicon surface at the bottom of the contact openings to provide low resistance silicide interconnections between the silicon substrate and the tungsten. A titanium nitride layer is formed over the titanium silicide and on the surfaces of the insulation layer, including the top surface of the insulation layer and the sidewall surfaces of the contact openings through the insulating layer. This titanium nitride layer provides a nucleation layer which permits a good bond to form from the tungsten through the titanium nitride and titanium silicide in the contact openings to the silicon substrate; and from the tungsten through the titanium nitride layer to the insulator material such as silicon dioxide (SO.sub.2), resulting in the formation of low resistance and low defect density contacts.
Abstract:
A magnetic field enhanced single wafer plasma etch reactor is disclosed. The features of the reactor include an electrically-controlled stepped magnetic field for providing high rate uniform etching at high pressures; temperature controlled reactor surfaces including heated anode surfaces (walls and gas manifold) and a cooled wafer supporting cathode; and a unitary wafer exchange mechanism comprising wafer lift pins which extend through the pedestal and a wafer clamp ring. The lift pins and clamp ring are moved vertically by a one-axis lift mechanism to accept the wafer from a cooperating external robot blade, clamp the wafer to the pedestal and return the wafer to the blade. The electrode cooling combines water cooling for the body of the electrode and a thermal conductivity-enhancing gas parallel-bowed interface between the wafer and electrode for keeping the wafer surface cooled despite the high power densities applied to the electrode. A gas feed-through device applies the cooling gas to the RF powered electrode without breakdown of the gas. Protective coatings/layers of materials such as quartz are provided for surfaces such as the clamp ring and gas manifold. The combination of these features provides a wide pressure regime, high etch rate, high throughput single wafer etcher which provides uniformity, directionality and selectivity at high gas pressures, operates cleanly and incorporates in-situ self-cleaning capability.