Magnetic field-enhanced plasma etch reactor
    1.
    发明授权
    Magnetic field-enhanced plasma etch reactor 失效
    磁场增强等离子体蚀刻反应器

    公开(公告)号:US5215619A

    公开(公告)日:1993-06-01

    申请号:US760848

    申请日:1991-09-17

    IPC分类号: H01J37/32 H01L21/00

    摘要: A magnetic field enhanced single wafer plasma etch reactor is disclosed. The features of the reactor include an electrically-controlled stepped magnetic field for providing high rate uniform etching at high pressures; temperature controlled reactor surfaces including heated anode surfaces (walls and gas manifold) and a cooled wafer supporting cathode; and a unitary wafer exchange mechanism comprising wafer lift pins which extend through the pedestal and a wafer clamp ring. The lift pins and clamp ring are moved vertically by a one-axis lift mechanism to accept the wafer from a cooperating external robot blade, clamp the wafer to the pedestal and return the wafer to the blade. The electrode cooling combines water cooling for the body of the electrode and a thermal conductivity-enhancing gas parallel-bowed interface between the wafer and electrode for keeping the wafer surface cooled despite the high power densities applied to the electrode. A gas feed-through device applies the cooling gas to the RF powered electrode without breakdown of the gas. Protective coatings/layers of materials such as quartz are provided for surfaces such as the clamp ring and gas manifold. The combination of these features provides a wide pressure regime, high etch rate, high throughput single wafer etcher which provides uniformity, directionality and selectivity at high gas pressures, operates cleanly and incorporates in-situ self-cleaning capability.

    摘要翻译: 公开了一种磁场增强型单晶片等离子体蚀刻反应器。 反应器的特征包括用于在高压下提供高速均匀蚀刻的电控步进磁场; 温度控制的反应器表面包括加热的阳极表面(壁和气体歧管)和冷却的晶片支撑阴极; 以及包括延伸穿过基座的晶片提升销和晶片夹紧环的整体晶片交换机构。 提升销和夹紧环通过单轴提升机构垂直移动,以从协作的外部机器人刀片接收晶片,将晶片夹紧到基座并将晶片返回到刀片。 电极冷却结合了用于电极体的水冷却和晶片和电极之间的热导率增强气体平行弓形界面,用于保持晶片表面冷却,尽管施加到电极的高功率密度。 气体馈通装置将冷却气体施加到RF供电的电极,而不会破坏气体。 为诸如夹紧环和气体歧管的表面提供保护涂层/诸如石英的材料层。 这些特征的组合提供了广泛的压力方案,高蚀刻速率,高通量单晶硅蚀刻器,其在高气体压力下提供均匀性,方向性和选择性,干净地操作并且并入现场自清洁能力。

    Magnetic field-enhanced plasma etch reactor
    2.
    发明授权
    Magnetic field-enhanced plasma etch reactor 失效
    磁场增强等离子体蚀刻反应器

    公开(公告)号:US4842683A

    公开(公告)日:1989-06-27

    申请号:US185215

    申请日:1988-04-25

    摘要: A magnetic field enhanced single wafer plasma etch reactor is disclosed. The features of the reactor include an electrically-controlled stepped magnetic field for providing high rate uniform etching at high pressures; temperature controlled reactor surfaces including heated anode surfaces (walls and gas manifold) and a cooled wafer supporting cathode; and a unitary wafer exchange mechanism comprising wafer lift pins which extend through the pedestal and a wafer clamp ring. The lift pins and clamp ring are moved vertically by a one-axis lift mechanism to accept the wafer from a cooperating external robot blade, clamp the wafer to the pedestal and return the wafer to the blade. The electrode cooling combines water cooling for the body of the electrode and a thermal conductivity-enhancing gas parallel-bowed interface between the wafer and electrode for keeping the wafer surface cooled despite the high power densities applied to the electrode. A gas feed-through device applies the cooling gas to the RF powered electrode without breakdown of the gas. Protective coatings/layers of materials such as quartz are provided for surfaces such as the clamp ring and gas manifold. The combination of these features provides a wide pressure regime, high etch rate, high throughput single wafer etcher which provides uniformity, directionality and selectivity at high gas pressures, operates cleanly and incorporates in-situ self-cleaning capability.

    摘要翻译: 公开了一种磁场增强型单晶片等离子体蚀刻反应器。 反应器的特征包括用于在高压下提供高速均匀蚀刻的电控步进磁场; 温度控制的反应器表面包括加热的阳极表面(壁和气体歧管)和冷却的晶片支撑阴极; 以及包括延伸穿过基座的晶片提升销和晶片夹紧环的整体晶片交换机构。 提升销和夹紧环通过单轴提升机构垂直移动,以从配合的外部机器人刀片接收晶片,将晶片夹紧到基座并将晶片返回到刀片。 电极冷却结合了用于电极体的水冷却和晶片和电极之间的热导率增强气体平行弓形界面,用于保持晶片表面冷却,尽管施加到电极的高功率密度。 气体馈通装置将冷却气体施加到RF供电的电极,而不会破坏气体。 为诸如夹紧环和气体歧管的表面提供保护涂层/诸如石英的材料层。 这些特征的组合提供了广泛的压力方案,高蚀刻速率,高通量单晶硅蚀刻器,其在高气体压力下提供均匀性,方向性和选择性,干净地操作并且并入现场自清洁能力。

    Plasma-enhanced CVD process using TEOS for depositing silicon oxide

    公开(公告)号:US5362526A

    公开(公告)日:1994-11-08

    申请号:US645999

    申请日:1991-01-23

    摘要: A high pressure, high throughput, single wafer, semiconductor processing reactor is disclosed which is capable of thermal CVD, plasma-enhanced CVD, plasma-assisted etchback, plasma self-cleaning, and deposition topography modification by sputtering, either separately or as part of in-situ multiple step processing. The reactor includes cooperating arrays of interdigitated susceptor and wafer support fingers which collectively remove the wafer from a robot transfer blade and position the wafer with variable, controlled, close parallel spacing between the wafer and the chamber gas inlet manifold, then return the wafer to the blade. A combined RF/gas feed-through device protects against process gas leaks and applies RF energy to the gas inlet manifold without internal breakdown or deposition of the gas. The gas inlet manifold is adapted for providing uniform gas flow over the wafer. Temperature-controlled internal and external manifold surfaces suppress condensation, premature reactions and decomposition and deposition on the external surfaces. The reactor also incorporates a uniform radial pumping gas system which enables uniform reactant gas flow across the wafer and directs purge gas flow downwardly and upwardly toward the periphery of the wafer for sweeping exhaust gases radially away from the wafer to prevent deposition outside the wafer and keep the chamber clean. The reactor provides uniform processing over a wide range of pressures including very high pressures. A low temperature CVD process for forming a highly conformal layer of silicon dioxide is also disclosed. The process uses very high chamber pressure and low temperature, and TEOS and ozone reactants. The low temperature CVD silicon dioxide deposition step is particularly useful for planarizing underlying stepped dielectric layers, either alone or in conjunction with a subsequent isotropic etch. A preferred in-situ multiple-step process for forming a planarized silicon dioxide layer uses (1) high rate silicon dioxide deposition at a low temperature and high pressure followed by (2) the deposition of the conformal silicon dioxide layer also at high pressure and low temperature, followed by (3) a high rate isotropic etch, preferably at low temperature and high pressure in the same reactor used for the two oxide deposition steps. Various combinations of the steps are disclosed for different applications, as is a preferred reactor self-cleaning step.

    Process for PECVD of silicon oxide using TEOS decomposition

    公开(公告)号:US4892753A

    公开(公告)日:1990-01-09

    申请号:US262993

    申请日:1988-10-26

    摘要: A high pressure, high throughput, single wafer, semiconductor processing reactor is disclosed which is capable of thermal CVD, plasma-enhanced CVD, plasma-assisted etchback, plasma self-cleaning, and deposition topography modification by sputtering, either separately or as part of in-situ multiple step processing. The reactor includes cooperating arrays of interdigitated susceptor and wafer support fingers which collectively remove the wafer from a robot transfer blade and position the wafer with variable, controlled, close parallel spacing between the wafer and the chamber gas inlet manifold, then return the wafer to the blade. A combined RF/gas feed-through device protects against process gas leaks and applies RF energy to the gas inlet manifold without internal breakdown or deposition of the gas. The gas inlet manifold is adapted for providing uniform gas flow over the wafer. Temperature-controlled internal and external manifold surfaces suppress condensation, premature reactions and decomposition and deposition on the external surfaces. The reactor also incorporates a uniform radial pumping gas system which enables uniform reactant gas flow across the wafer and directs purge gas flow downwardly and upwardly toward the periphery of the wafer for sweeping exhaust gases radially away from the wafer to prevent deposition outside the wafer and keep the chamber clean. The reactor provides uniform processing over a wide range of pressures including very high pressures. A low temperature CVD process for forming a highly conformal layer of silicon dioxide is also disclosed. The process uses very high chamber pressure and low temperature, and TEOS and ozone reactants. The low temperature CVD silicon dioxide deposition step is particularly useful for planarizing underlying stepped dielectric layers, either alone or in conjunction with a subsequent isotropic etch. A preferred in-situ multiple-step process for forming a planarized silicon dioxide layer uses (1) high rate silicon dioxide deposition at a low temperature and high pressure followed by (2) the deposition of the conformal silicon dioxide layer also at high pressure and low temperature, followed by (3) a high rate isotropic etch, preferably at low temperature and high pressure in the same reactor used for the two oxide deposition steps. Various combinations of the steps are disclosed for different applications, as is a preferred reactor self-cleaning step.

    CVD of silicon oxide using TEOS decomposition and in-situ planarization
process
    6.
    发明授权
    CVD of silicon oxide using TEOS decomposition and in-situ planarization process 失效
    使用TEOS分解和原位平面化处理的氧化硅CVD

    公开(公告)号:US4872947A

    公开(公告)日:1989-10-10

    申请号:US262992

    申请日:1988-10-26

    摘要: A high pressure, high throughput, single wafer, semiconductor processing reactor is disclosed which is capable of thermal CVD, plasma-enhanced CVD, plasma-assisted etchback, plasma self-cleaning, and deposition topography modification by sputtering, either separately or as part of in-situ multiple step processing. A low temperature CVD process for forming a highly conformal layer of silicon dioxide is also disclosed. The process uses very high chamber pressure and low temperature, and TEOS and ozone reactants. The low temperature CVD silicon dioxide deposition step is particularly useful for planarizing underlying stepped dielectric layers, either along or in conjunction with a subsequent isotropic etch. A preferred in-situ multiple-step process for forming a planarized silicon dioxide layer uses (1) high rate silicon dioxide deposition at a low temperature and high pressure followed by (2) the deposition of the conformal silicon dioxide layer also at high pressure and low temperature, followed by (3) a high rate isotropic etch, preferably at low temperature and high pressure in the same reactor used for the two oxide deposition steps. Various combinations of the steps are disclosed for different applications, as is a preferred reactor self-cleaning step.

    摘要翻译: 公开了一种高压,高通量,单晶片,半导体处理反应器,其能够通过溅射单独地或作为一部分的溅射进行热CVD,等离子体增强CVD,等离子体辅助回蚀,等离子体自清洁和沉积形貌修饰 原位多步处理。 还公开了用于形成高度保形二氧化硅层的低温CVD工艺。 该过程使用非常高的室压和低温,以及TEOS和臭氧反应物。 低温CVD二氧化硅沉积步骤特别可用于平坦化下面的阶梯介电层,或者沿着或结合随后的各向同性蚀刻。 用于形成平坦化的二氧化硅层的优选的原位多步骤方法使用(1)在低温和高压下高速二氧化硅沉积,随后(2)也在高压下沉积保形二氧化硅层,以及 低温,随后(3)高速各向同性蚀刻,优选在低温和高压下,在用于两个氧化物沉积步骤的相同反应器中。 公开了用于不同应用的步骤的各种组合,优选的反应器自清洁步骤也是如此。

    PECVD of compounds of silicon from silane and nitrogen
    7.
    发明授权
    PECVD of compounds of silicon from silane and nitrogen 失效
    来自硅烷和氮的硅化合物的PECVD

    公开(公告)号:US6040022A

    公开(公告)日:2000-03-21

    申请号:US59734

    申请日:1998-04-14

    摘要: An inlet gas manifold for a vacuum deposition chamber incorporates inlet apertures which increase in diameter or cross-section transverse to the direction of gas flow. The aperture configuration increases the dissociation gases such as nitrogen and, thus increases the rate of silicon nitride deposition provided by nitrogen gas chemistry, without requiring the use of reactants such as ammonia. While one could use ammonia in the deposition gas chemistry if desired, the process provides the option of completely eliminating ammonia. The inlet manifold containing the increasing-diameter gas inlet holes provides enhanced control of the process and the deposited film, and is also useful for forming other dielectrics such as silicon oxide and silicon oxynitride. In particular, silicon oxynitride films are characterized by low hydrogen content and by compositional uniformity.

    摘要翻译: 用于真空沉积室的入口气体歧管包括入口孔,其直径或横截面横向于气体流动方向增加。 孔径构造增加了解离气体如氮气,从而增加了由氮气化学提供的氮化硅沉积速率,而不需要使用诸如氨的反应物。 虽然如果需要,可以在沉积气体化学中使用氨,该方法提供完全消除氨的选择。 包含增加直径的气体入口孔的入口歧管提供对工艺和沉积膜的增强的控制,并且还可用于形成其它电介质,例如氧化硅和氮氧化硅。 特别地,氧氮化硅膜的特征在于低氢含量和组成均匀性。

    PECVD of silicon nitride films
    8.
    发明授权
    PECVD of silicon nitride films 失效
    氮化硅膜的PECVD

    公开(公告)号:US5773100A

    公开(公告)日:1998-06-30

    申请号:US746178

    申请日:1996-11-06

    摘要: An inlet gas manifold for a vacuum deposition chamber incorporates inlet apertures which increase in diameter or cross-section transverse to the direction of gas flow. The aperture configuration increases the dissociation gases such as nitrogen and, thus increases the rate of silicon nitride deposition provided by nitrogen gas chemistry, without requiring the use of reactants such as ammonia. While one could use ammonia in the deposition gas chemistry if desired, the process provides the option of completely eliminating ammonia. The inlet manifold containing the increasing-diameter gas inlet holes provides enhanced control of the process and the deposited film.

    摘要翻译: 用于真空沉积室的入口气体歧管包括入口孔,其直径或横截面横向于气体流动方向增加。 孔径构造增加了解离气体如氮气,从而增加了由氮气化学提供的氮化硅沉积速率,而不需要使用诸如氨的反应物。 虽然如果需要,可以在沉积气体化学中使用氨,该方法提供完全消除氨的选择。 包含增加直径的气体入口孔的入口歧管提供对过程和沉积膜的增强的控制。

    Web lift system for chemical mechanical planarization
    10.
    发明授权
    Web lift system for chemical mechanical planarization 失效
    用于化学机械平面化的Web提升系统

    公开(公告)号:US06561884B1

    公开(公告)日:2003-05-13

    申请号:US09651657

    申请日:2000-08-29

    IPC分类号: B24B700

    摘要: Generally, a method and system for lifting a web of polishing material is provided. In one embodiment, the system includes a platen that has a first lift member disposed adjacent to a first side and a second lift member disposed adjacent to a second side. The platen is adapted to support the web of polishing media that is disposed between the first and the second lift members. A method includes supporting a web of polishing media on a platen between a first lift member and a second lift member and moving at least the first lift member or the second lift member to an extended position relative the platen that places the web in a spaced-apart relation with the platen.

    摘要翻译: 通常,提供了用于提升抛光材料的网的方法和系统。 在一个实施例中,系统包括具有邻近第一侧设置的第一提升构件和邻近第二侧设置的第二提升构件的压板。 压板适于支撑布置在第一和第二升降构件之间的抛光介质的腹板。 一种方法包括在第一提升构件和第二提升构件之间的台板上支撑抛光介质的腹板,并且将至少第一提升构件或第二提升构件移动到相对于台板的延伸位置, 与压板分开关系。