公开(公告)号：US20240268109A1

公开(公告)日：2024-08-08

申请号：US18638859

申请日：2024-04-18

申请人： KIOXIA CORPORATION

发明人： Yusuke SHIMA

IPC分类号： H10B41/27 ,  G11C5/02 ,  G11C5/06 ,  H01L21/3065 ,  H01L21/3105 ,  H01L21/67 ,  H01L21/768 ,  H01L29/04 ,  H10B43/27

CPC分类号： H10B41/27 ,  G11C5/025 ,  G11C5/06 ,  H01L21/3065 ,  H01L21/31053 ,  H01L21/67075 ,  H01L21/76876 ,  H01L29/04 ,  H10B43/27

摘要： A semiconductor memory device includes a first region where a plurality of conductive layers, a plurality of insulating layers, a semiconductor layer, and a gate insulating layer are formed and a second region different from the first region above a substrate. The plurality of conductive layers include a plurality of first conductive layers and a plurality of second conductive layers. The semiconductor memory device includes a plurality of first films different from the first conductive layers disposed in same layers as the plurality of first conductive layers in the second region and a plurality of second films different from the second conductive layers and the first films disposed in same layers as the plurality of second conductive layers in the second region.

公开(公告)号：US20240266177A1

公开(公告)日：2024-08-08

申请号：US18612005

申请日：2024-03-21

申请人： Lam Research Corporation

发明人： Ruopeng Deng ,  Xiaolan Ba ,  Tianhua Yu ,  Yu Pan ,  Juwen Gao

IPC分类号： H01L21/285 ,  H01L21/768 ,  H10B41/27 ,  H10B43/27

CPC分类号： H01L21/28562 ,  H01L21/28568 ,  H01L21/76876 ,  H01L21/76877 ,  H10B41/27 ,  H10B43/27

摘要： Methods and apparatuses are described that provide tungsten deposition with low roughness. In some embodiments, the methods involve co-flowing nitrogen with hydrogen during an atomic layer deposition process of depositing tungsten that uses hydrogen as a reducing agent. In some embodiments, the methods involve depositing a cap layer, such as tungsten oxide or amorphous tungsten layer, on a sidewall surface of a 3D NAND structure. The disclosed embodiments have a wide variety of applications including depositing tungsten into 3D NAND structures.

公开(公告)号：US20240209500A1

公开(公告)日：2024-06-27

申请号：US18557675

申请日：2021-05-06

申请人： Applied Materials, Inc.

发明人： Xi CEN ,  Wei Min CHAN ,  Kai WU ,  Peiqi WANG ,  Mingrui ZHAO ,  Michael C. KUTNEY ,  Kazuya DAITO ,  Harpreet SINGH

IPC分类号： C23C16/44 ,  C23C16/02 ,  C23C16/04 ,  C23C16/455 ,  C23C16/54 ,  H01L21/285 ,  H01L21/67 ,  H01L21/768 ,  H01L23/532

CPC分类号： C23C16/4405 ,  C23C16/0281 ,  C23C16/045 ,  C23C16/45553 ,  C23C16/45561 ,  C23C16/45565 ,  C23C16/54 ,  H01L21/28562 ,  H01L21/67017 ,  H01L21/76856 ,  H01L21/76876 ,  H01L21/76879 ,  H01L23/53266

摘要： Embodiments herein are generally directed to electronic device manufacturing and, more particularly, to systems and methods for forming substantially void-free and seam-free tungsten features in a semiconductor device manufacturing scheme. In one embodiment, a substrate processing system features a processing chamber and a gas delivery system fluidly coupled to the processing chamber. The gas delivery system includes a first radical generator for use in a differential inhibition treatment process and a second radical generator for use in a chamber clean process.

公开(公告)号：US12002679B2

公开(公告)日：2024-06-04

申请号：US17601918

申请日：2020-04-07

申请人： Lam Research Corporation

发明人： Michael Bowes ,  Tsung-Han Yang ,  Anand Chandrashekar ,  Xing Zhang

IPC分类号： H01L21/768 ,  H01L21/285

CPC分类号： H01L21/28568 ,  H01L21/76876 ,  H01L21/76877

摘要： Methods of depositing a tungsten nucleation layers that achieve very good step coverage are provided. The methods involve a sequence of alternating pulses of a tungsten-containing precursor and a boron-containing reducing agent, while co-flowing hydrogen (H2) with the boron-containing reducing agent. The H2 flow is stopped prior to the tungsten-containing precursor flow. By co-flowing H2 with the boron-containing reducing agent but not with the tungsten-containing precursor flow, a parasitic CVD component is reduced, resulting in a more self-limiting process. This in turn improves step coverage and conformality of the nucleation layer. Related apparatuses are also provided.

公开(公告)号：US11978665B2

公开(公告)日：2024-05-07

申请号：US17469291

申请日：2021-09-08

申请人： Kioxia Corporation

发明人： Kenichi Ide

IPC分类号： H01L21/768 ,  H01L23/522

CPC分类号： H01L21/76843 ,  H01L21/76802 ,  H01L21/76876 ,  H01L23/5226

摘要： A semiconductor manufacturing method includes forming a concave portion in a layer provided above a substrate from a top surface of the layer downwards, the layer including an insulation layer at least partially. The method includes forming a silicon film on an inner surface of the concave portion. The method includes exposing the silicon film to a raw material gas of metal and an inhibitor gas that inhibits growth of the metal at a first temperature, to replace a first portion of the silicon film located in an upper-end side portion of the concave portion with a first conductive film containing the metal. The method includes exposing the silicon film to the raw material gas and the inhibitor gas at a second temperature lower than the first temperature, to replace a second portion of the silicon film with a second conductive film containing the metal.

公开(公告)号：US11842925B2

公开(公告)日：2023-12-12

申请号：US17578679

申请日：2022-01-19

申请人： NANYA TECHNOLOGY CORPORATION

发明人： Che-Hsien Liao ,  Yu-Chang Chang

IPC分类号： H01L21/768 ,  H10B12/00

CPC分类号： H01L21/76861 ,  H01L21/7684 ,  H01L21/76843 ,  H01L21/76876 ,  H10B12/488

摘要： The present application discloses method for fabricating a conductive feature and a method for fabricating a semiconductor device. The method includes providing a substrate; forming a recess in the substrate; conformally forming a first nucleation layer in the recess; performing a post-treatment to the first nucleation layer; and forming a first bulk layer on the first nucleation layer to fill the recess. The first nucleation layer and the first bulk layer configure the conductive feature. The first nucleation layer and the first bulk layer include tungsten. The post-treatment includes a borane-containing reducing agent.

公开(公告)号：US20230386915A1

公开(公告)日：2023-11-30

申请号：US17825678

申请日：2022-05-26

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

发明人： Chung-Liang CHENG ,  Lin-Yu HUANG ,  Li-Zhen YU ,  Huang-Lin CHAO ,  Pinyen LIN

IPC分类号： H01L21/768 ,  H01L29/40 ,  H01L29/417

CPC分类号： H01L21/76876 ,  H01L29/401 ,  H01L29/41733 ,  H01L21/76846 ,  H01L21/76867 ,  H01L29/78696

摘要： A method is provided for forming a contact plug by bottom-up metal growth. In one step, a substrate is etched to form a contact hole that exposes a silicon-containing feature in the substrate. In one step, a silicide layer is formed on the silicon-containing feature. In one step, a metal seed layer is formed over the silicide layer. In one step, a metal contact layer is deposited over the metal seed layer to form the contact plug in the contact hole.

公开(公告)号：US20230343643A1

公开(公告)日：2023-10-26

申请号：US17868475

申请日：2022-07-19

申请人： Applied Materials, Inc.

发明人： Chih-Hsun HSU ,  Shiyu YUE ,  Wei LEI ,  Yi XU ,  Jiang LU ,  Yu LEI ,  Ziye XIONG ,  Tsung-Han YANG ,  Zhimin QI ,  Aixi ZHANG ,  Jie ZHANG ,  Liqi WU ,  Rongjun WANG ,  Shihchung CHEN ,  Meng-Shan WU ,  Chun-Chieh WANG ,  Annamalai LAKSHMANAN ,  Yixiong YANG ,  Xianmin TANG

IPC分类号： H01L21/768 ,  H01L23/522

CPC分类号： H01L21/76877 ,  H01L21/76876 ,  H01L21/76843 ,  H01L21/76865 ,  H01L23/5226 ,  H01L21/76826

摘要： A method and apparatus for a gap-fill in semiconductor devices are provided. The method includes forming a metal seed layer on an exposed surface of the substrate, wherein the substrate has features in the form of trenches or vias formed in a top surface of the substrate, the features having sidewalls and a bottom surface extending between the sidewalls. A gradient oxidation process is performed to oxidize exposed portions of the metal seed layer to form a metal oxide, wherein the gradient oxidation process preferentially oxidizes a field region of the substrate over the bottom surface of the features. An etch back process removes or reduces the oxidized portion of the seed layer. A metal gap-fill process fills or partially fills the features with a gap fill material.

公开(公告)号：US20230343641A1

公开(公告)日：2023-10-26

申请号：US18346520

申请日：2023-07-03

申请人： WESTERN DIGITAL TECHNOLOGIES, INC.

发明人： Roshan Jayakhar TIRUKKONDA ,  Kartik SONDHI ,  Raghuveer S. MAKALA ,  Senaka KANAKAMEDALA

IPC分类号： H01L21/768 ,  H01L23/522 ,  H01L23/528 ,  H10B43/27 ,  H10B43/10 ,  H10B43/35 ,  H10B41/10 ,  H10B41/27 ,  H10B41/35 ,  H01L21/306

CPC分类号： H01L21/7685 ,  H01L23/5226 ,  H01L23/5283 ,  H10B43/27 ,  H10B43/10 ,  H10B43/35 ,  H10B41/10 ,  H10B41/27 ,  H10B41/35 ,  H01L21/30608 ,  H01L21/76859 ,  H01L21/76876

摘要： A method includes forming an alternating stack of first material layers and second material layers, forming an etch mask material layer containing an opening over the alternating stack, forming a non-conformal cladding liner over the etch mask material layer, where the non-conformal cladding liner includes a horizontally extending portion that overlies a horizontal top surface of the etch mask material layer and a vertically extending portion contacting a sidewall of the opening in the etch mask material layer, implanting ions of dopant atoms into the non-conformal cladding line, and performing an second anisotropic etch process that etches an unmasked portion of the alternating stack selective to the etch mask material layer and the non-conformal cladding liner. The non-conformal cladding liner provides a higher etch resistance relative to the unmasked portion of the alternating stack after the step of implanting ions than before the step of implanting ions.

公开(公告)号：US20230307294A1

公开(公告)日：2023-09-28

申请号：US17813654

申请日：2022-07-20

申请人： CHANGXIN MEMORY TECHNOLOGIES, INC.

发明人： Ke MA

IPC分类号： H01L21/768

CPC分类号： H01L21/76883 ,  H01L21/7684 ,  H01L21/76846 ,  H01L21/76876 ,  H01L21/76886 ,  H01L23/5283

摘要： The present disclosure relates to the technical field of semiconductors, and provides a method of manufacturing a semiconductor structure and a semiconductor structure. The method of manufacturing a semiconductor structure includes: providing an initial structure, wherein the initial structure includes a dielectric layer and an initial metal interconnect structure, the initial metal interconnect structure penetrates the dielectric layer and covers a top surface of the dielectric layer; treating an exposed surface of the initial metal interconnect structure by using a first gas; cleaning the exposed surface of the initial metal interconnect structure by using a first liquid; and grinding to remove a partial structure of the initial metal interconnect structure, wherein a retained part of the initial metal interconnect structure forms a metal interconnect structure.