Semiconductor light emitting device and method of manufacturing the same
    81.
    发明授权
    Semiconductor light emitting device and method of manufacturing the same 有权
    半导体发光器件及其制造方法

    公开(公告)号:US07851813B2

    公开(公告)日:2010-12-14

    申请号:US12199038

    申请日:2008-08-27

    CPC classification number: H01L33/06 H01L33/32

    Abstract: Provided are a semiconductor light emitting device and a method of manufacturing the same. The semiconductor light emitting layer comprises a first conductive type semiconductor layer, an active layer on the first conductive type semiconductor layer, and a second conductive type semiconductor layer on the active layer. The active layer comprises a quantum well layer, a quantum barrier layer, and a dual barrier layer.

    Abstract translation: 提供一种半导体发光器件及其制造方法。 半导体发光层包括第一导电类型半导体层,第一导电类型半导体层上的有源层和有源层上的第二导电类型半导体层。 有源层包括量子阱层,量子势垒层和双阻挡层。

    Clutter Signal Filtering Using Eigenvectors In An Ultrasound System
    82.
    发明申请
    Clutter Signal Filtering Using Eigenvectors In An Ultrasound System 有权
    在超声系统中使用特征向量的杂波信号滤波

    公开(公告)号:US20100280384A1

    公开(公告)日:2010-11-04

    申请号:US12769411

    申请日:2010-04-28

    CPC classification number: G01S15/8981 A61B8/488

    Abstract: Embodiments for setting eigenvectors for clutter signal filtering from Doppler signals in an ultrasound system are disclosed. In one embodiment, the ultrasound system includes: a Doppler signal acquisition unit configured to transmit and receive ultrasound signals to and from a target object to acquire first Doppler signals; and a processing unit configured to compute a plurality of eigenvectors by using the first Doppler signals and form second Doppler signals corresponding to directions of the computed eigenvectors, the processing unit being further configured to compute component values of the second Doppler signals and set eigenvectors for clutter signal filtering among the plurality of eigenvectors by using the computed component values.

    Abstract translation: 公开了一种用于在超声系统中设置来自多普勒信号的杂波信号滤波的特征向量的实施例。 在一个实施例中,超声系统包括:多普勒信号获取单元,被配置为向目标对象发送和从目标对象接收超声信号以获取第一多普勒信号; 以及处理单元,被配置为通过使用所述第一多普勒信号来计算多个特征向量,并且形成对应于所计算的特征向量的方向的第二多普勒信号,所述处理单元还被配置为计算所述第二多普勒信号的分量值并且设置用于杂波的特征向量 通过使用所计算的分量值在多个特征向量之间进行信号滤波。

    Hinge apparatus and watch type portable terminal having the same
    84.
    发明授权
    Hinge apparatus and watch type portable terminal having the same 有权
    具有相同功能的铰链装置和手表型便携式终端

    公开(公告)号:US07568263B2

    公开(公告)日:2009-08-04

    申请号:US11101456

    申请日:2005-04-08

    Abstract: A hinge apparatus includes a substantially cylindrical holder having at least one guide hole with a predetermined degree slope that extends in a longitudinal direction. A hinge shaft includes a substantially cylindrical surface configured to linearly move in the longitudinal direction of the holder. A guide pin has an end located inside the guide hole and is configured to extend through the cylindrical surface of the hinge shaft. Therefore, when the hinge shaft moves linearly in the holder, the guide pin moves along the guide hole so that the hinge shaft rotates in the holder.

    Abstract translation: 铰链装置包括基本上圆柱形的保持器,其具有至少一个沿纵向方向延伸的预定斜度的引导孔。 铰链轴包括基本上圆柱形的表面,其构造成沿着保持器的纵向方向线性移动。 引导销具有位于引导孔内部的端部,并且构造成延伸穿过铰链轴的圆柱形表面。 因此,当铰链轴在保持架中线性移动时,引导销沿着引导孔移动,使得铰链轴在保持器中旋转。

    SEMICONDUCTOR LIGHT EMITTING DEVICE
    85.
    发明申请
    SEMICONDUCTOR LIGHT EMITTING DEVICE 有权
    半导体发光器件

    公开(公告)号:US20080315179A1

    公开(公告)日:2008-12-25

    申请号:US12144246

    申请日:2008-06-23

    CPC classification number: H01L33/06 H01L33/08 H01L33/32

    Abstract: Provided is a semiconductor light emitting device. The semiconductor light emitting device comprises a first conductive type semiconductor layer, an active layer, and a second conductive type semiconductor layer. The active layer comprises a first active layer, a second active layer, an electron barrier layer on the first conductive type semiconductor layer. The first active layer and the second active layer comprise a quantum well layer and a quantum barrier layer. The electron barrier layer is formed between the first active layer and the second active layer. The second conductive type semiconductor layer is formed on the active layer.

    Abstract translation: 提供了一种半导体发光器件。 半导体发光器件包括第一导电类型半导体层,有源层和第二导电类型半导体层。 有源层包括第一有源层,第二有源层,第一导电类型半导体层上的电子势垒层。 第一有源层和第二有源层包括量子阱层和量子势垒层。 电子势垒层形成在第一有源层和第二有源层之间。 第二导电型半导体层形成在有源层上。

    Method and apparatus for testing a memory device
    86.
    发明授权
    Method and apparatus for testing a memory device 失效
    用于测试存储器件的方法和装置

    公开(公告)号:US07469360B2

    公开(公告)日:2008-12-23

    申请号:US11856777

    申请日:2007-09-18

    Applicant: Tae Yun Kim

    Inventor: Tae Yun Kim

    CPC classification number: G11C29/12015 G11C29/14

    Abstract: Disclosed is a method for testing a memory device with a long-term clock signal by automatically performing precharge only after activation. In this method, a signal for precharging the banks of the memory device is automatically generated only at the falling edge of an external signal when a signal for activating the banks is applied. Accordingly, the present invention ensures a stable test of the memory device, reducing the testing time.

    Abstract translation: 公开了一种通过仅在激活后自动执行预充电来测试具有长期时钟信号的存储器件的方法。 在该方法中,当施加用于激活存储体的信号时,仅在外部信号的下降沿才自动产生用于对存储器件的存储体进行预充电的信号。 因此,本发明确保了存储器件的稳定测试,减少了测试时间。

    ULTRASOUND SYSTEM AND METHOD FOR FORMING AN ULTRASOUND IMAGE
    87.
    发明申请
    ULTRASOUND SYSTEM AND METHOD FOR FORMING AN ULTRASOUND IMAGE 有权
    超声波系统和形成超声图像的方法

    公开(公告)号:US20080044054A1

    公开(公告)日:2008-02-21

    申请号:US11770351

    申请日:2007-06-28

    Abstract: Embodiments of the present invention may provide an ultrasound system and a method for forming an ultrasound image. The ultrasound system includes: a diagnosis unit operable to transmit ultrasound signals to a target object and receive ultrasound signals reflected from the target object; a volume data forming unit operable to form volume data based on the received ultrasound signals; an input unit operable to receive plane selection information, region of interest (ROI) setting information and ROI reset information from a user; a processor operable to form a plane image of a plane selected in the volume data according to the plane selection information and set a ROI on the plane image based on the ROI setting information, the image forming unit being configured to form a ROI image and a 3D image corresponding to the ROI by using the volume data; a display unit operable to display the plane image or the ROI image together with the 3D image; and a control unit operable to control that the display unit displays the plane image with displaying the 3D image in response to the ROI reset information and the processor sets a new ROI on the displayed plane image based on the ROI reset information and forms a ROI image and a 3D image corresponding to the new ROI.

    Abstract translation: 本发明的实施例可以提供超声系统和用于形成超声图像的方法。 超声波系统包括:诊断单元,其可操作以将超声信号发送到目标对象并接收从目标对象反射的超声信号; 音量数据形成单元,用于基于所接收的超声信号来形成音量数据; 输入单元,用于从用户接收平面选择信息,感兴趣区域(ROI)设置信息和ROI重置信息; 处理器,用于根据所述平面选择信息,形成在所述卷数据中选择的平面的平面图像,并且基于所述ROI设置信息在所述平面图像上设置ROI,所述图像形成单元被配置为形成ROI图像,以及 通过使用卷数据对应于ROI的3D图像; 显示单元,其可操作以与3D图像一起显示平面图像或ROI图像; 以及控制单元,其可操作以控制所述显示单元响应于所述ROI重置信息显示所述3D图像来显示所述平面图像,并且所述处理器基于所述ROI重置信息在所显示的平面图像上设置新的ROI,并且形成ROI图像 以及对应于新的ROI的3D图像。

    Synchronous memory device capable of controlling write recovery time
    88.
    发明授权
    Synchronous memory device capable of controlling write recovery time 有权
    能够控制写恢复时间的同步存储器件

    公开(公告)号:US07263013B2

    公开(公告)日:2007-08-28

    申请号:US10880831

    申请日:2004-06-29

    Applicant: Tae-Yun Kim

    Inventor: Tae-Yun Kim

    CPC classification number: G11C7/22 G11C7/12

    Abstract: A memory device for adjusting a write recovery time includes a synchronous write recovery time controlling block which receives a control signal for performing an auto-precharge operation and delays out the control signal as long as a certain clock section of the operational clock corresponding to the write recovery time, an asynchronous write recovery time controlling block for delaying out the control signal coupled thereto as long as a fixed delay time corresponding to the write recovery time, a selecting block for choosing the synchronous write recovery time controlling block or the asynchronous write recovery time controlling block, and an auto-precharge controlling block which outputs as an auto-precharge execution signal used in performing the auto-precharge operation a signal outputted from the synchronous write recovery time controlling block or the asynchronous write recovery time controlling block in response to a write command.

    Abstract translation: 用于调整写恢复时间的存储装置包括同步写恢复时间控制块,其接收用于执行自动预充电操作的控制信号,并且延迟控制信号,只要与写入相对应的操作时钟的某个时钟部分 恢复时间,异步写入恢复时间控制块,用于延迟耦合到其上的控制信号,只要与写恢复时间相对应的固定延迟时间,用于选择同步写恢复时间控制块的选择块或异步写恢复时间 控制块,以及自动预充电控制块,其作为自动预充电执行信号输出,用于在执行自动预充电操作时响应于同步写入恢复时间控制块或异步写入恢复时间控制块输出的信号 写命令。

    Merged data memory testing circuits and related methods which provide
different data values on merged data lines
    89.
    发明授权
    Merged data memory testing circuits and related methods which provide different data values on merged data lines 失效
    合并的数据存储器测试电路和相关方法,在合并的数据线上提供不同的数据值

    公开(公告)号:US5912899A

    公开(公告)日:1999-06-15

    申请号:US772696

    申请日:1996-12-23

    CPC classification number: G11C7/1078 G11C29/12 G11C29/34 G11C29/48 G11C7/1006

    Abstract: An integrated circuit memory device includes first and second input buffers, and first and second input bus lines corresponding to the first and second input buffers. The first input buffer is connected to the first input bus line while a transfer gate is provided between the second input buffer and the second input bus line. The transfer gate connects the second input buffer with the second input bus line during a data input-output operation and disconnects the second input buffer from the second input bus line during a memory test operation. A coupling circuit couples the first and second input bus lines during the memory test operation so that a data value from the first input bus line is inverted and applied to the second input bus line responsive to a first value of an address buffer output during the memory test operation. The data value from the first input line is applied to the second input bus line without inversion responsive to a second value of the address buffer output during the memory test operation. Furthermore, a coupling circuit isolates the first and second input bus lines during the data input-output operation.

    Abstract translation: 集成电路存储器件包括第一和第二输入缓冲器,以及对应于第一和第二输入缓冲器的第一和第二输入总线。 第一输入缓冲器连接到第一输入总线,同时在第二输入缓冲器和第二输入总线之间提供传输门。 在数据输入 - 输出操作期间,传输门将第二输入缓冲器与第二输入总线连接,并且在存储器测试操作期间将第二输入缓冲器与第二输入总线断开。 耦合电路在存储器测试操作期间耦合第一和第二输入总线,使得来自第一输入总线的数据值被反相并且响应于在存储器期间输出的地址缓冲器的第一值而被施加到第二输入总线 测试操作。 在存储器测试操作期间,响应于地址缓冲器输出的第二值,来自第一输入行的数据值被施加到第二输入总线,而不反转。 此外,耦合电路在数据输入 - 输出操作期间隔离第一和第二输入总线。

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