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81.发明申请公开(公告)号：US20210043776A1
公开(公告)日：2021-02-11
申请号：US16966873
申请日：2019-12-24
Inventor： Hongfei CHENG
IPC: H01L29/786 , H01L29/417
Abstract: A thin film transistor is provided to include a gate, an active layer, a first electrode and a second electrode. The first electrode includes at least two first conductive parts extending in a first direction and a first connection part extending in a second direction intersecting the first direction. The at least two first conductive parts are arranged at intervals along the second direction and a first end of each of the at least first conductive parts is coupled to the first connection part, and two adjacent ones of the at least two first conductive parts form a first U-shaped opening with the first connection part. The second electrode includes at least one second conductive part extending in the first direction, a first end of the second conductive part proximal to the first connection part is in the first U-shaped opening.
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公开(公告)号：US20200321417A1
公开(公告)日：2020-10-08
申请号：US16308657
申请日：2018-06-08
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor： Hongfei CHENG , Yuxin ZHANG
IPC: H01L27/32
Abstract: A display panel includes an array substrate and a package substrate disposed opposite to each other, wherein, the array substrate includes a plurality of pixel units arranged in an array, and at least one of the pixel units includes a driving transistor. Further, the package substrate includes a first electrode and a second electrode disposed opposite to each other and an insulating layer located between the two electrodes. Wherein, the first electrode is electrically connected to the first terminal of the driving transistor, and the second electrode is electrically connected to the control terminal of the driving transistor.
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83.发明申请公开(公告)号：US20200161593A1
公开(公告)日：2020-05-21
申请号：US16604870
申请日：2019-03-21
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor： Hongfei CHENG
Abstract: An array substrate and a method for manufacturing the same, a method for repairing an array substrate, and a display apparatus are provided. The array substrate includes a base substrate and pixel units above the base substrate, each pixel unit includes a light emitting device, the light emitting device includes a first electrode and a second electrode, at least one pixel unit is provided with a repair structure, the repair structure includes a first part and a second part mutually insulated, the first part and the second part are electrically coupled after being repaired, the first part is electrically coupled to the first electrode of the light emitting device in the pixel unit where the repair structure is located, the second part is electrically coupled to the first electrode of the light emitting device in any pixel unit other than the pixel unit where the repair structure is located.
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公开(公告)号：US20200035946A1
公开(公告)日：2020-01-30
申请号：US16335599
申请日：2018-06-07
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor： Hongfei CHENG
Abstract: A display substrate and a manufacture method thereof, and a display panel are provided. The display substrate includes: a substrate, including a display region and a non-display region around the display region; at least one protrusion on the substrate. The protrusion is disposed in the non-display region.
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公开(公告)号：US20190355765A1
公开(公告)日：2019-11-21
申请号：US16472932
申请日：2018-09-14
Applicant: BOE Technology Group Co., Ltd.
Inventor： Pan LI , Hongfei CHENG , Xinyin WU
IPC: H01L27/12 , H01L23/522
Abstract: This disclosure relates to an array substrate and a display device. The array substrate includes a display area and a lead area, the display area including a plurality of signal lines, and the lead area including fanout lines connected with the signal lines, wherein the lead area further includes capacitance adjustment sections non-electrically connected with at least one of the fanout lines, the capacitance adjustment sections are at a layer different from a layer where at least one of the fanout lines is.
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Patent Agency Ranking
公开(公告)号：US20190064607A1
公开(公告)日：2019-02-28
申请号：US15935677
申请日：2018-03-26
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor： Hongfei CHENG , Jianbo XIAN
IPC: G02F1/1343 , H01L27/12 , G02F1/1345 , G02F1/1362 , G02F1/1335
Abstract: A display panel comprises a base substrate and a plurality of gate lines and data lines arranged on the base substrate. The gate lines and the data lines are crisscrossed to define a plurality of pixel regions. The display panel further comprises pixel electrodes arranged within the pixel regions and common electrodes arranged in opposite to the pixel electrodes, wherein an orthographic projection of the common electrodes on the substrate is not overlapped with an orthographic projection of the gate lines on the substrate, and/or the orthographic projection of the common electrodes on the substrate is not overlapped with an orthographic projection of the data lines on the substrate.
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公开(公告)号：US20180373075A1
公开(公告)日：2018-12-27
申请号：US15736982
申请日：2017-06-07
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor： Hongfei CHENG , Xin LI
IPC: G02F1/1343 , G06F3/14 , G02F1/1334 , G02F1/1333
Abstract: A double sided display includes two liquid crystal display panels. When the pixel electrode and the common electrode are in an on state, they form an electric field which causes the liquid crystal molecules to deflect. Due to the effect of a polymer network, the liquid crystal polymer is in a scattering state, which will destroy the condition of total reflection between the two substrates for light from the backlight source. As a result, at least a part of light from the backlight source is emitted from a side of the first substrate after being scattered by the liquid crystal polymer. When the pixel electrode and the common electrode are in the off state, the long axis direction of liquid crystal molecules is consistent with the extension direction of the polymer long chains in the liquid crystal polymer, and the liquid crystal polymer is in a transparent state.
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88.发明申请公开(公告)号：US20180197883A1
公开(公告)日：2018-07-12
申请号：US15688304
申请日：2017-08-28
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor： Hongfei CHENG
IPC: H01L27/12 , G02F1/1362
CPC classification number: H01L27/124 , G02F1/136227 , G02F1/136286 , G02F2001/136218 , G02F2201/121 , H01L27/1255
Abstract: An array substrate is provided, which includes: a base substrate; a plurality of gate lines, a plurality of data lines and a plurality of common electrode lines arranged on the base substrate; a pixel electrode arranged at each region defined by adjacent gate lines and adjacent data lines; and a TFT arranged at a position in proximity to a junction between each of the gate lines and the corresponding data line. A drain electrode of the TFT is electrically connected to the pixel electrode through a via-hole. Each common electrode line includes a primary electrode line extending in a direction identical to an extension direction of the gate line, and a secondary electrode line connected in parallel to the primary electrode line. The secondary electrode line includes at least one first secondary electrode line arranged between the via-hole and the data line.
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89.发明申请公开(公告)号：US20180108291A1
公开(公告)日：2018-04-19
申请号：US15506398
申请日：2016-09-02
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor： Xueguang HAO , Yongda MA , Hongfei CHENG
CPC classification number: G09G3/2092 , G06F3/0416 , G06F3/0418 , G09G3/3266 , G09G3/3674 , G09G2310/0286 , G09G2310/0289 , G09G2310/061 , G09G2310/08 , G09G2354/00 , G11C7/02 , G11C19/28
Abstract: The invention provides a shift register unit, including a pull-up node, a pull-down node, a low-level signal terminal, a second clock signal terminal and a pull-down module, the second clock signal terminal supplies a high-level signal during an input sub-period and a pull-down sub-period, the pull-down module is connected to the pull-up node, the pull-down node, an output terminal of the shift register unit and the low-level signal terminal, the shift register unit further includes a discharging module, which is configured to make the pull-down node and the low-level signal terminal be connected in a conducting path during the input sub-period, and both the pull-up node and the output terminal of the shift register unit are connected with the low-level signal terminal in conducting paths during the input sub-period and the pull-down sub-period.
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公开(公告)号：US20180096956A1
公开(公告)日：2018-04-05
申请号：US15537049
申请日：2016-08-26
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor： Pan LI , Hongfei CHENG , Yong Qiao , Jian XU , Yongda MA
CPC classification number: H01L23/60 , H01L27/0288 , H01L27/0296 , H01L27/12 , H01L27/124
Abstract: Disclosed are an electrostatic protection structure, array substrate and display device. The electrostatic protection structure includes a first electrostatic protection unit and a second electrostatic protection unit which are disposed in sequence. One end of the first electrostatic protection unit is connected with a first electrostatic beginning end, and another end of the first electrostatic protection unit is connected with an electrostatic discharge end; the second electrostatic protection unit includes a first conduction structure, of which one end is connected with a second electrostatic beginning end and another end is connected with an electrostatic terminating end. The second electrostatic beginning end is a outflow end for static electricity, the first conduction structure is configured to disconnect from the second electrostatic beginning end and/or said electrostatic terminating end when static electricity passes the first conduction structure.
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