FIELD COLOR SEQUENTIAL IMAGING METHOD AND RELATED TECHNOLOGY
    81.
    发明申请
    FIELD COLOR SEQUENTIAL IMAGING METHOD AND RELATED TECHNOLOGY 审中-公开
    领域颜色顺序成像方法及相关技术

    公开(公告)号:US20100259552A1

    公开(公告)日:2010-10-14

    申请号:US12757660

    申请日:2010-04-09

    申请人: Ching-Hsiang Hsu

    发明人: Ching-Hsiang Hsu

    IPC分类号: G09G5/02

    摘要: Field color sequential (FCS) imaging method and technology/apparatus based on FCS principle are provided. In an embodiment, while displaying a frame based on FCS principle, the invention includes: extracting at least a monochrome subfield value and at least a mixed subfield value from each color channel of each pixel of the frame, writing corresponding monochrome subfield value of each pixel in association with a single color channel, and writing corresponding mixed subfield value of each pixel in association with a mixed color which is mixed by at least two color channels.

    摘要翻译: 提供了基于FCS原理的场彩色顺序(FCS)成像方法和技术/设备。 在一个实施例中,在基于FCS原理显示帧的同时,本发明包括:从帧的每个像素的每个颜色通道提取至少一个单色子字段值和至少一个混合子字段值,写入每个像素的相应单色子字段值 与单个颜色通道相关联,并且与通过至少两个颜色通道混合的混合颜色相关联地写入每个像素的相应混合子场值。

    METHOD FOR PROGRAMMING A MEMORY STRUCTURE
    82.
    发明申请
    METHOD FOR PROGRAMMING A MEMORY STRUCTURE 有权
    编程存储器结构的方法

    公开(公告)号:US20090168531A1

    公开(公告)日:2009-07-02

    申请号:US12144645

    申请日:2008-06-24

    IPC分类号: G11C16/04

    CPC分类号: G11C16/3418

    摘要: A memory structure includes a first memory cell and a second memory cell located at an identical bit line and adjacent to the first memory cell. Each memory cell includes a substrate, a source, a drain, a charge storage device, and a gate. A method for programming the memory structure includes respectively providing a first gate biasing voltage and a second gate biasing voltage to the first memory cell and the second memory cell, boosting the absolute value of a channel voltage of the first memory cell to generate electron and hole pairs at the drain of the second memory cell through gate-induced drain leakage or band-to-band tunneling, and injecting the electron of the generated electron and hole pairs into the charge storage device of the first memory cell to program the first memory cell.

    摘要翻译: 存储器结构包括位于相同位线并与第一存储器单元相邻的第一存储器单元和第二存储器单元。 每个存储单元包括衬底,源极,漏极,电荷存储器件和栅极。 一种用于对存储器结构进行编程的方法包括分别向第一存储单元和第二存储单元提供第一栅极偏置电压和第二栅极偏置电压,提高第一存储单元的沟道电压的绝对值以产生电子和空穴 通过栅极引起的漏极泄漏或带对带隧穿在第二存储单元的漏极处对,并将所产生的电子和空穴对的电子注入到第一存储单元的电荷存储装置中,以对第一存储单元 。

    IMAGE COMPENSATION CIRCUIT, METHOD THEREOF, AND LCD DEVICE USING THE SAME
    83.
    发明申请
    IMAGE COMPENSATION CIRCUIT, METHOD THEREOF, AND LCD DEVICE USING THE SAME 审中-公开
    图像补偿电路,其方法和使用其的LCD装置

    公开(公告)号:US20090010339A1

    公开(公告)日:2009-01-08

    申请号:US11773875

    申请日:2007-07-05

    IPC分类号: H04N7/32

    摘要: Input image signals are spatially and temporally compensated. First, gray scales of a target pixel in a current frame and in a previous frame are compared to determine whether to spatially and temporally compensate the input image signals or not. Next, in accordance to weight parameters and gray scales of pixels adjacent to the target pixel, the target pixel of the current frame is spatially compensated. Further, based on the gray scale of the target pixel of the previous frame, the target pixel of the current frame after spatial compensation is temporally compensated.

    摘要翻译: 输入图像信号在空间和时间上得到补偿。 首先,比较当前帧和先前帧中的目标像素的灰度级,以确定是否对输入图像信号进行空间和时间补偿。 接下来,根据与目标像素相邻的像素的权重参数和灰度级,对当前帧的目标像素进行空间补偿。 此外,基于前一帧的目标像素的灰度级,空间补偿后的当前帧的目标像素被时间上补偿。

    Method for color correction
    84.
    发明授权
    Method for color correction 失效
    颜色校正方法

    公开(公告)号:US07375854B2

    公开(公告)日:2008-05-20

    申请号:US10798867

    申请日:2004-03-12

    IPC分类号: G06F15/00 G03F3/08 G06K9/00

    CPC分类号: H04N9/69 H04N5/202

    摘要: A method for color correction is provided. In this method, a plurality of groups of gray levels and luminance of light source of display device are respectively selected by color measurement system. The selected data of each color light are respectively calculated to obtain fitting functions which can fit the gray level data of each interval. The fitting luminance of the gray levels in interval is obtained by the fitting function and formed into a lookup table. Then in order to correspond a gamma curve of normalized gray data of image to a predetermined target curve, the two gamma curves are first taken to logarithmic calculation and the modified gray signals are obtained from the lookup table, then the modified gray signals are transmitted out for providing the display device to express the gray distribution state. The method for color correction is applicable to various display devices, especially liquid crystal display device.

    摘要翻译: 提供了一种用于颜色校正的方法。 在该方法中,通过彩色测量系统分别选择多组灰度级和显示装置的光源亮度。 分别计算每个颜色光的所选数据,以获得可以适合每个间隔的灰度级数据的拟合函数。 通过拟合函数获得间隔中灰度级的拟合亮度,形成查找表。 然后,为了将图像的归一化灰度数据的伽马曲线对应于预定的目标曲线,首先将两个伽马曲线进行对数计算,并从查找表中获得修改的灰度信号,然后将修改的灰度信号发送出去 用于提供显示装置来表达灰色分布状态。 用于颜色校正的方法适用于各种显示装置,特别是液晶显示装置。

    Modified Mite Allergen and Pharmaceutical Uses Thereof
    85.
    发明申请
    Modified Mite Allergen and Pharmaceutical Uses Thereof 有权
    改良螨过敏原及其制药用途

    公开(公告)号:US20080050406A1

    公开(公告)日:2008-02-28

    申请号:US11778946

    申请日:2007-07-17

    IPC分类号: A61K39/35 A61P37/00

    摘要: The present invention provides a modified Dermatophagoides pteronyssinus allergen Der p 5 protein which has ability to inhibit IgE binding when exposed against to the antigen. A method for treating allergy comprising administrating a therapeutically effective dose of the modified D. pteronyssinus allergen Der p 5 protein to a subject suffering from allergy Der p 5 is also provided.

    摘要翻译: 本发明提供了当暴露于抗原时具有抑制IgE结合的能力的修饰的Dermatophagoides pteronyssinus变应原Der p 5蛋白。 还提供了治疗过敏的方法,其包括将治疗有效剂量的经修饰的D.tteronyssinus变应原Der p 5蛋白施用于患有过敏Der p 5的受试者。

    Method for color correction
    86.
    发明申请
    Method for color correction 失效
    颜色校正方法

    公开(公告)号:US20050201615A1

    公开(公告)日:2005-09-15

    申请号:US10798867

    申请日:2004-03-12

    IPC分类号: G06K1/00 G06K9/00

    CPC分类号: H04N9/69 H04N5/202

    摘要: A method for color correction is provided. In this method, a plurality of groups of gray levels and luminance of light source of display device are respectively selected by color measurement system. The selected data of each color light are respectively calculated to obtain fitting functions which can fit the gray level data of each interval. The fitting luminance of the gray levels in interval is obtained by the fitting function and formed into a lookup table. Then in order to correspond a gamma curve of normalized gray data of image to a predetermined target curve, the two gamma curves are first taken to logarithmic calculation and the modified gray signals are obtained from the lookup table, then the modified gray signals are transmitted out for providing the display device to express the gray distribution state. The method for color correction is applicable to various display devices, especially liquid crystal display device.

    摘要翻译: 提供了一种用于颜色校正的方法。 在该方法中,通过彩色测量系统分别选择多组灰度级和显示装置的光源亮度。 分别计算每个颜色光的所选数据,以获得可以适合每个间隔的灰度级数据的拟合函数。 通过拟合函数获得间隔中灰度级的拟合亮度,形成查找表。 然后,为了将图像的归一化灰度数据的伽马曲线对应于预定的目标曲线,首先将两个伽马曲线进行对数计算,并从查找表中获得修改的灰度信号,然后将修改的灰度信号发送出去 用于提供显示装置来表达灰色分布状态。 用于颜色校正的方法适用于各种显示装置,特别是液晶显示装置。

    Nonvolatile semiconductor memory device having divided bit lines
    89.
    发明授权
    Nonvolatile semiconductor memory device having divided bit lines 失效
    具有划分位线的非易失性半导体存储器件

    公开(公告)号:US06735115B2

    公开(公告)日:2004-05-11

    申请号:US09956212

    申请日:2001-09-18

    IPC分类号: G11C1604

    CPC分类号: G11C16/24

    摘要: A non-volatile semiconductor memory device having divided bit lines. A main bit line is controlled by at least one bit line selection device to transfer its potential to a selected sub bit line, such that memory cells in a selected sector work and overloading of the bit line generated by a parasitic capacitance can be prevented. The memory cells and the bit line selection device are arranged in parallel in a P-well and a N-well, respectively, thereby preventing disturbances during programming or erasing the bit line.

    摘要翻译: 具有划分位线的非易失性半导体存储器件。 主位线由至少一个位线选择装置控制,以将其电位转移到所选择的子位线,使得可以防止所选扇区中的存储器单元工作,并且可以防止由寄生电容产生的位线的过载。 存储单元和位线选择装置分别并排布置在P阱和N阱中,从而防止在编程或擦除位线期间的干扰。