Method and control circuit for determining an operating state when controlling a fan motor
    81.
    发明申请
    Method and control circuit for determining an operating state when controlling a fan motor 有权
    用于在控制风扇电动机时确定操作状态的方法和控制电路

    公开(公告)号:US20070001643A1

    公开(公告)日:2007-01-04

    申请号:US10550719

    申请日:2003-10-21

    IPC分类号: H02P27/04

    CPC分类号: H02H7/0844 H02P29/02

    摘要: A method is described for determining an operating state on triggering a fan motor, the fan motor being operated with the aid of a switching device, the switching device being activated via a pulse-width-modulated triggering signal, a pulse duty factor of the triggering signal predefining a triggering state of the fan motor, a voltage potential at the node between fan motor and switching device or a motor current being measured as a measured variable, an operating state being determined on triggering the fan motor as a function of the measured variable and the pulse duty factor.

    摘要翻译: 描述了一种用于确定触发风扇电动机的操作状态的方法,风扇电动机借助于开关装置操作,开关装置通过脉冲宽度调制的触发信号被激活,触发的脉冲占空因数 信号预先定义风扇电动机的触发状态,风扇电动机和开关装置之间的节点处的电压电位或被测量的电动机电流作为测量变量,在作为测量变量的函数触发风扇电动机时确定操作状态 和脉冲占空因数。

    Data processing device and method for transferring data
    82.
    发明申请
    Data processing device and method for transferring data 有权
    数据处理设备和数据传输方法

    公开(公告)号:US20060224809A1

    公开(公告)日:2006-10-05

    申请号:US10548344

    申请日:2004-03-03

    IPC分类号: G06F13/14

    CPC分类号: G06F13/4059

    摘要: The data processing device according to the invention comprises a first processing unit (1) linked to a first bus (5), a second processing unit (2) linked to a second bus (6), a first bus master (3) linked to the first bus (5), a second bus master (4) linked to the second bus (6), a first and a second communication channel (7, 20, 8, 21) linking the first and the second bus master (3, 4) with each other, and a control unit (9) controlling the data transfer between the first and the second bus master (3, 4) via the first and the second communication channel (7, 20, 8, 21).

    摘要翻译: 根据本发明的数据处理装置包括链接到第一总线(5)的第一处理单元(1),链接到第二总线(6)的第二处理单元(2),连接到第二总线 第一总线(5),连接到第二总线(6)的第二总线主机(4),连接第一和第二总线主机(3)的第一和第二通信信道(7,20,8,21) 以及控制单元(9),经由第一和第二通信信道(7,20,8,21)控制第一和第二总线主机(3,4)之间的数据传输。

    Method for identifying an overload current of an electric drive
    83.
    发明申请
    Method for identifying an overload current of an electric drive 有权
    识别电力驱动器的过载电流的方法

    公开(公告)号:US20060066276A1

    公开(公告)日:2006-03-30

    申请号:US10528850

    申请日:2003-06-27

    IPC分类号: H02P7/00

    CPC分类号: H02H7/093 H02H1/0007

    摘要: The invention relates to Method to detect a sluggishness or the blocking of an electric drive (3), which is triggered via a power semiconductor component (7). The electric drive (3) can be operated in both a partial load range (PWM timing signal

    摘要翻译: 本发明涉及一种用于检测通过功率半导体元件(7)触发的电驱动器(3)的缓慢或阻塞的方法。 电驱动器(3)可以在部分负载范围(PWM定时信号<100%)以及满载范围(PWM定时信号= 100%)中工作,但始终作为时序的函数 PWM信号(29,30)。 评估电路(37)与微控制器(25)连接。 在评估电路(37)中,从经由第一功率半导体部件(7)流动的电流I检测出在时间间隔内产生的脉冲,并将检测脉冲数A 1 *,A 2 * 预期脉冲数A 1,A 2。

    Step-up frequency converter
    85.
    发明申请
    Step-up frequency converter 审中-公开
    升压型变频器

    公开(公告)号:US20060009173A1

    公开(公告)日:2006-01-12

    申请号:US10514703

    申请日:2003-05-19

    IPC分类号: H01Q11/12 H04B1/04

    摘要: A step-up frequency converter includes a first and a second input for two input signals that are to be mixed, the first input signal having a lower frequency than the second input signal, a first and a second control element each of which is provided with a control connection and two main connections, the flow of current between the main connections being controllable by means of a signal at the control connection, and an output for a mixed signal generated from the two input signals that are to be mixed. The control connections of the two control elements are connected to the second input signal in a counter-clocked mode while the first connections of the two control elements are connected to each other and to the output. A first symmetrizer connects the input for the first input signal to the first main connections of the two control elements.

    摘要翻译: 升压变频器包括用于要混合的两个输入信号的第一和第二输入,第一输入信号具有比第二输入信号低的频率,第一和第二控制元件,每个第一和第二控制元件设置有 控制连接和两个主要连接,通过控制连接处的信号可控制主连接之间的电流流动,以及从要混合的两个输入信号产生的混合信号的输出。 两个控制元件的控制连接以计时模式连接到第二输入信号,同时两个控制元件的第一连接彼此连接并连接到输出端。 第一对称器将第一输入信号的输入连接到两个控制元件的第一主连接。

    System for protecting a power semiconductor output stage that switches an inductive load
    86.
    发明授权
    System for protecting a power semiconductor output stage that switches an inductive load 有权
    用于保护切换感性负载的功率半导体输出级的系统

    公开(公告)号:US06888327B1

    公开(公告)日:2005-05-03

    申请号:US10070879

    申请日:2000-07-25

    IPC分类号: H02P6/12 H02P25/092 H02P6/00

    CPC分类号: H02P25/0925 Y10S388/903

    摘要: A system for protecting a power semiconductor output stage that, as a function of a control signal, connects an inductive load to a direct-current supply voltage and disconnects it therefrom. Protection from the induced voltages is achieved, without a freewheeling diode, in that the disconnection energy occurring at the inductive load upon disconnection can be transferred in transformer fashion to an additional inductance that is loaded with a resistance or is coupled in the countercurrent direction to the direct-current supply voltage.

    摘要翻译: 一种用于保护功率半导体输出级的系统,其作为控制信号的函数将感性负载连接到直流电源电压并从其断开。 实现了没有续流二极管的感应电压的保护,因为在断开时在感性负载下发生的断开能量可以以变压器方式传递到负载电阻的附加电感或者以逆流方向耦合到 直流电源电压。

    Multichip module
    87.
    发明申请
    Multichip module 有权
    多芯片模块

    公开(公告)号:US20050083150A1

    公开(公告)日:2005-04-21

    申请号:US10495290

    申请日:2002-10-28

    CPC分类号: H01P1/047

    摘要: A bondwire transition arrangement for interconnecting a signal port on one IC of a multichip module with a signal port on another, adjacent, IC of the same module employs a distributed signal-transition process in which the signal on one port appears as subsignals at tapping points along a series transmission-line segment arrangement between that port and ground on the same IC and the subsignals are recombined along a second series transmission-line segment arrangement connected between the other port and ground on the other IC. Spatially corresponding tapping points are interconnected via bondwires.

    摘要翻译: 用于将多芯片模块的一个IC上的信号端口与相同模块的另一个IC上的信号端口互连的键合线转换装置采用分布式信号转换过程,其中一个端口上的信号在分接点处显示为子信号 沿同一IC上该端口和地之间的串联传输线段布置,并且子信号沿着连接在另一个IC上的另一个端口和地之间的第二串联传输线段布置重新组合。 空间相应的攻丝点通过焊接线相互连接。

    Integrated circuit with flash memory including dedicated flash bus and flash bridge
    88.
    发明授权
    Integrated circuit with flash memory including dedicated flash bus and flash bridge 有权
    具有闪存的集成电路,包括专用闪存总线和闪存桥

    公开(公告)号:US06735661B2

    公开(公告)日:2004-05-11

    申请号:US09891449

    申请日:2001-06-26

    IPC分类号: G06F1340

    CPC分类号: G06F13/4018

    摘要: This invention relates to the structure and design of microprocessor ICs, in particular to the embedding or integration of a non-volatile, so-called flash memory into an ICs. Such a flash memory may be integrated by providing a dedicated flash bus which operationally links the flash memory with one or more microprocessors on the IC. Unfortunately, flash memories have relatively long access times compared to usual modern microprocessors. To achieve that the flash memory keeps pace with the microprocessor(s), a dedicated flash bus (2) links the flash memory (1) to the microprocessor (3), said flash bus (2) having a width m which is greater than the width n of the microprocessor's data bus (8). Preferably, width m is a multiple of width n. A plurality of intermediate storage registers (4) connects the flash bus (2) with the data bus (8) of the microprocessor (3) for performing the width conversion. These intermediate storage registers (4), together with an additional tag register (5), may serve as cache for the microprocessor's data requests, further increasing the potential speed of the IC.

    摘要翻译: 本发明涉及微处理器IC的结构和设计,特别涉及将非易失性所谓的闪速存储器嵌入或集成到IC中。 可以通过提供专用闪存总线来集成这样的闪速存储器,该闪存总线将闪速存储器与IC上的一个或多个微处理器连接起来。 不幸的是,闪存与通常的现代微处理器相比具有相对长的访问时间。 为了实现闪存与微处理器的步伐,专用闪存总线(2)将闪存(1)连接到微处理器(3),所述闪存总线(2)的宽度m大于 微处理器数据总线(8)的宽度n。 优选地,宽度m是宽度n的倍数。 多个中间存储寄存器(4)将闪存总线(2)与微处理器(3)的数据总线(8)连接,用于执行宽度转换。 这些中间存储寄存器(4)和附加标签寄存器(5)可以用作微处理器数据请求的高速缓存,进一步增加了IC的潜在速度。

    Electronic ballast for at least one low-pressure discharge lamp

    公开(公告)号:US06433490B1

    公开(公告)日:2002-08-13

    申请号:US09766611

    申请日:2001-01-23

    IPC分类号: H05B3700

    摘要: An electronic ballast for at least one low-pressure discharge lamp contains an inverter which is connected to a direct-voltage source (UBUS), a load circuit which is connected to the inverter and contains the lamp (LA) and a series resonant circuit, and an evaluating circuit arrangement (M1) which reacts to different operating states of the lamp (LA) and in the case of a defect or removal of the lamp (LA) generates corresponding signals for switching off the inverter. A heating transformer, for heating the coils (W1, W2), the primary winding (Tp) of which is connected in series with a switch (S3) to the output of the inverter and in any case is connected to the direct-voltage source (UBUS) if the inverter is switched off on account of the heating-coil defect or the removal of the lamp (LA), with the switch (S3) being clocked in this off-phase.

    Circuit for heating a component
    90.
    发明授权
    Circuit for heating a component 失效
    用于加热部件的电路

    公开(公告)号:US06429410B1

    公开(公告)日:2002-08-06

    申请号:US09341370

    申请日:1999-09-30

    申请人: Stefan Koch

    发明人: Stefan Koch

    IPC分类号: H05B102

    摘要: A circuit for heating a component is maintained at a predefined operating temperature by a resistance heating element. A control system for the temperature of the resistance heating element is provided. From a determination of the average electrical energy delivered to the resistance heating element, an analysis arrangement concludes that the predefined operating temperature of the component to be heated has been at least approximately reached.

    摘要翻译: 用于加热部件的电路通过电阻加热元件保持在预定的工作温度。 提供了一种用于电阻加热元件温度的控制系统。 从确定传递到电阻加热元件的平均电能,分析布置得出结论,待加热的部件的预定操作温度至少已经达到。